NuMicro® NUC029LEE/NUC029SEE32-bit Arm® Cortex® -M0 MicrocontrollerAug, 2018 Page 81 of 497 Rev 1.00NUMICRO® NUC029LEE/NUC029SEE TECHNICAL REFERENCE MANUAL29 13 UART1_INT UART1 UART1 interrupt30 14 SPI0_INT SPI0 SPI0 interrupt31 15 SPI1_INT SPI1 SPI1 interrupt32 16 - - Reserved33 17 - - Reserved34 18 I2C0_INT I2C0 I2C0 interrupt35 19 I2C1_INT I2C1 I2C1 interrupt36 20 - - Reserved37 21 - - Reserved38 22 - - Reserved39 23 USB_INT USBD USB 2.0 FS Device interrupt40 24 - - Reserved41 25 - - Reserved42 26 PDMA_INT PDMA PDMA interrupt43 27 - - Reserved44 28 PWRWU_INT CLKC Clock controller interrupt for chip wake-up from Power-down state45 29 ADC_INT ADC ADC interrupt46 30 IRC_INT IRC IRC TRIM interrupt47 31 RTC_INT RTC Real Time Clock interruptTable 6.2-3 System Interrupt Map6.2.10.2 Vector TableWhen an interrupt is accepted, the processor will automatically fetch the starting address of theinterrupt service routine (ISR) from a vector table in memory. For ARMv6-M, the vector table baseaddress is fixed at 0x00000000. The vector table contains the initialization value for the stackpointer on reset, and the entry point addresses for all exception handlers. The vector number onprevious page defines the order of entries in the vector table associated with exception handlerentry as illustrated in previous section.Vector Table Word Offset Description0 SP_main – The Main stack pointerVector Number Exception Entry Pointer using that Vector NumberTable 6.2-4 Vector Table Format6.2.10.3 Operation DescriptionNVIC interrupts can be enabled and disabled by writing to their corresponding Interrupt Set-
