NuMicro® NUC029LEE/NUC029SEE32-bit Arm® Cortex® -M0 MicrocontrollerAug, 2018 Page 304 of 497 Rev 1.00NUMICRO® NUC029LEE/NUC029SEE TECHNICAL REFERENCE MANUALFigure 6.11-2 Window Watchdog Timer Block Diagram6.11.4 Basic ConfigurationThe WWDT peripheral clock is enabled in APBCLK[0] and clock source can be selected inCLKSEL2[17:16].6.11.5 Functional DescriptionThe Window Watchdog Timer (WWDT) includes a 6-bit down counter with programmableprescale value to define different WWDT time-out intervals.The clock source of 6-bit WWDT is based on system clock divide 2048 (HCLK/2048) or internal10 kHz oscillator with a programmable 11-bit prescale counter value which controlled byPERIODSEL (WWDTCRL[11:8]) setting. Also, the correlate of PERIODSEL and prescale valueare listed in the Table 6.11-1.PERIODSEL Prescaler Value Max. Time-Out Period Max. Time-Out Interval(WWDT_CLK=10 KHz)0000 1 1 * 64 * TWWDT 6.4 ms0001 2 2 * 64 * TWWDT 12.8 ms0010 4 4 * 64 * TWWDT 25.6 ms0011 8 8 * 64 * TWWDT 51.2 ms0100 16 16 * 64 * TWWDT 102.4 ms0101 32 32 * 64 * TWWDT 204.8 ms0110 64 64 * 64 * TWWDT 409.6 ms0111 128 128 * 64 * TWWDT 819.2 ms1000 192 192 * 64 * TWWDT 1.2288 s1001 256 256 * 64 * TWWDT 1.6384 s1010 384 384 * 64 * TWWDT 2.4576 s1011 512 512 * 64 * TWWDT 3.2768 s1100 768 768 * 64 * TWWDT 4.9152 s1101 1024 1024 * 64 * TWWDT 6.5536 s1110 1536 1536 * 64 * TWWDT 9.8304 s1111 2048 2048 * 64 * TWWDT 13.1072 sTable 6.11-1 Window Watchdog Timer Prescale Value Selection WWDT CountingWhen the WWDTEN bit is set, WWDT down counter will start counting from 0x3F to 0. To preventprogram runs to disable WWDT counter counting unexpected, the WWDT control registerWWDTCR can only be written once after chip is powered on or reset. User cannot disable WWDTcounter counting (WWDTEN), change counter prescale period (PERIODSEL) or change windowcompare value (WINCMP) while WWDTEN (WWDTCR[0]) bit has been enabled by software
