12.2 Allocation of Memory Areas12-712.2.4 When Using High-speed Counter Function Control unitFP0H modeChannel no. CountinputHard-wareresetinputMemory area used PerformanceSpecifications Relatedinstruct-tionsControlflagElapsedvalueareaTargetvalue areaMin.inputpulsewidthMax.countingspeed[Single-phase]AdditioninputSubtractioninputCH0 X0 X2 R9110 DT90300DT90301DT90302DT90303High-speedinput5 μs100kHz F0(MV)F1(DMV)F165(CAM0)F166(HC1S)F167(HC1R)CH1 X1 X2 R9111 DT90304DT90305DT90306DT90307CH2 X3 X5 R9112 DT90308DT90309DT90310DT90311CH3 X4 X5 R9113 DT90312DT90313DT90314DT90315[2-phaseinput]PhasedifferenceinputIndividualinputDirectiondistinctionCH0 X0X1 X2 R9110 DT90300DT90301DT90302DT90303 High-speedinput10 μs50 kHzCH2 X3X4 X5 R9112 DT90308DT90309DT90310DT90311FPΣ modeChannel no. CountinputHard-wareresetinputMemory area used PerformanceSpecifications Relatedinstruct-tionsControlflagElapsedvalueareaTargetvalue areaMin.inputpulsewidthMax.countingspeed[Single-phase]AdditioninputSubtractioninputCH0 X0 X2 R903A DT90044DT90045DT90046DT90047High-speedinput5 μs100kHz F0(MV)F1(DMV)F165(CAM0)F166(HC1S)F167(HC1R)CH1 X1 X2 R903B DT90048DT90049DT90050DT90051CH2 X3 X5 R903C DT90200DT90201DT90202DT90203CH3 X4 X5 R903D DT90204DT90205DT90206DT90207[2-phaseinput]PhasedifferenceinputIndividualinputDirectiondistinctionCH0 X0X1 X2 R903A DT90044DT90045DT90046DT90047 High-speedinput10 μs50 kHzCH2 X3X4 X5 R903C DT90200DT90201DT90202DT90203(Note 1): When the reset input settings of reset input for the single-phase input overlap at CH0 and CH1 or CH2 andCH3, the setting of CH0 or CH2 has priority.(Note 2) Only F1 (DMV) instruction can perform the reading and writing of elapsed value area. Maximum counting speedThese values are available only when the conditions of each item (such as counting methodor channels) are executed. These values are available when the high-speed counter matchON (F166) instruction, high-speed counter match OFF (F167) instruction, pulse outputfunction or other interrupt controls are not performed.
