NT6D71 UILC Line card Page 387 of 906Circuit Card Description and InstallationThe serial control interface is an IPE bus that communicates with theU transceivers.IPE interface logicThe IPE interface logic consists of a Card-LAN interface, a IPE bus interface,a maintenance signaling channel interface, a digital pad, and a clockconverter.The Card-LAN interface is used for routine card maintenance, which includespolling the line cards to find in which card slot the UILC is installed. It alsoqueries the status and identification of the card and reports the configurationdata and firmware version of the card.The IPE bus interface connects one IPE bus loop that has 32 channelsoperating at 64 kbps and one additional validation and signaling bit.The Maintenance Signaling Channel (MSC) interface communicatessignaling and card identification information from the system CPU to theUILC MCU. The signaling information also contains maintenanceinstructions.The digital pad provides gain or attenuation values to condition the level ofthe digitized transmission signal according to the network loss plan. This setstransmission levels for B-channel voice calls.The clock converter converts the 5.12 MHz clock from the IPE backplane intoa 2.56 MHz clock to time the IPE bus channels and an 8-kHz clock to providePCM framing bits.U interface logicThe U interface logic consists of a transceiver circuit. It provides looptermination and high-voltage protection to eliminate the external hazards onthe DSL. The U interface supports voice and data terminals, D-channel packetdata terminals, and NT1s. A UILC has eight transceivers to support eightDSLs for point-to-point operation.
