Embedded Tri-Mode Ethernet MAC User Guide www.xilinx.com 147UG074 (v2.2) February 22, 2010RChapter 5Miscellaneous FunctionsThis chapter provides useful design information for the Virtex®-4 FPGA Embedded Tri-Mode Ethernet MAC. It contains the following sections:• “Clock Frequency Support”• “Ethernet MAC Configuration,” page 149• “Auto-Negotiation Interrupt,” page 151Clock Frequency SupportTable 5-1 through Table 5-5 summarize the supported clock frequencies of the EthernetMAC. All clock signal output frequencies for both the transmit and receive modules aregenerated in the clock-generation module of the Ethernet MAC.Table 5-1: Transmit Clock Speeds (PHYEMAC#GTXCLK)Clock Signals Direction 1000 Mb/s 100 Mb/s 10 Mb/sPHYEMAC#GTXCLK Input 125 MHz 125 MHz 125 MHzTable 5-2: Receive Clock Speeds (PHYEMAC#RXCLK)Clock Signals Direction 1000 Mb/s 100 Mb/s 10 Mb/sPHYEMAC#RXCLK Input 125 MHz 25 MHz 2.5 MHzTable 5-3: Client Clock FrequencyData Rate Direction 1000 Mb/s 100 Mb/s 10 Mb/sEMAC#CLIENTRXCLIENTCLKOUT/CLIENTEMAC#RXCLIENTCLKINOutput/Input125 MHz 12.5 MHz 1.25 MHzEMAC#CLIENTTXCLIENTCLKOUT/CLIENTEMAC#TXCLIENTCLKINOutput/Input125 MHz 12.5 MHz 1.25 MHzTable 5-4: MII/GMII/RGMII Clock FrequencyClock Signals Direction 1000 Mb/s 100 Mb/s 10 Mb/sEMAC#CLIENTTXGMIIMIICLKOUT/CLIENTEMAC#TXGMIIMIICLKINOutput/Input125 MHz 25 MHz 2.5 MHzwww.BDTIC.com/XILINX
