Xilinx Virtex-4 User Manual
Also see for Virtex-4 RocketIO: User guideConfiguration user guide
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Contents
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UG074 (v2.2) February 22, 2010 www.xilinx.com Embedded Tri-Mode Ethernet MAC User GuideRevision HistoryThe following table shows the revision history for this document.Date Version Revision11/11/04 1.0 Initial Xilinx release.07/05/05 1.1 In Chapter 2:• Revised Table 2-6, page 23, “Tie-Off Pins,” page 24, and Table 2-10, page 25.In Chapter 3:• Revised Table 3-6 and Figure 3-5. Added information to “Normal Frame Transmission”.Revised Figure 3-6, “Client Underrun”, Figure 3-7, and Figure 3-9.• Added information to “Transmit (TX) Client – 16-bit Wide Interface,” page 43.• Revised “SGMII/1000BASE-X PCS/PMA,” page 48 and Figure 3-18, page 49, Figure 3-19,page 49, and Figure 3-21, page 50.• Added information to “Flow Control Block,” page 57 and the “Flow ControlImplementation Example,” page 60.• Revised Figure 3-32, page 59.• Revised “Generic Host Bus,” page 70.• Revised Table 3-17, page 73, and Table 3-20, page 76.• Revised Table 3-22, page 78 through Table 3-31, page 83.• Added “Connecting the MDIO to an External PHY” and Figure 3-49, page 96.• Revised Ethernet MAC I/Os in Figure 3-55, page 97, Figure 3-60, page 103, Figure 3-65,page 112, Figure 3-71, page 120, and Figure 3-75, page 128.• Revised Figure 3-66, page 113.• Added information to “Auto-Negotiation Interrupt,” page 145.• Added information to “SGMII Standard,” page 146.In Chapter 4:• Revised sample code in “Interfacing to the Processor DCR,” page 150.In Chapter 5:• Replaced Figure 5-2, page 154 and Figure 5-3, page 156.Added Appendix A, “Ethernet MAC Timing Model.”07/20/05 1.2 Revised figures.09/07/05 1.3 Corrected items from version 1.1 and 1.2. Inserted eight new figures into Chapter 5,“Miscellaneous Functions.” Updated pin 76 in Table 2-9. Revised Figure 3-56, Figure 3-57,Figure 3-61, Figure 3-63, Figure 3-67, Figure 3-68, Figure 3-72, Figure 5-1, Figure 5-2, andFigure 5-3. Added “Tri-Mode RGMII v1.3” in Chapter 3. Moved the “Using the DCR Bus as theHost Bus”, “Description of Ethernet MAC Register Access through the DCR Bus”, and“Address Code” sections to the “Host Interface” section.www.BDTIC.com/XILINX |
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