Xilinx Virtex-4 User Manual
Also see for Virtex-4 RocketIO: User guideConfiguration user guide
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Embedded Tri-Mode Ethernet MAC User Guide www.xilinx.com 83UG074 (v2.2) February 22, 2010Host InterfaceRFigure 3-43 shows the timing diagram for reading the multicast address from one of thefour multicast address registers.For reading a multicast address register in HOSTWRDATA[31:0], the RNW field is set to 1,and the multicast address field should be set with the register number to be read. Themulticast address register read data is returned in HOSTRDDATA[31:0]. The LSW is themulticast address [31:0]. The MSW contains 0x0000 and the multicast address [47:32]. Forexamples of accessing a multicast address register, see “Interfacing to the Processor DCR”in Chapter 6.HOSTMIIMSEL acts as a read enable. It must be held Low for an even number of clockcycles during a read operation.Using the DCR Bus as the Host BusWhen the DCR bus is used to access the internal registers of the Ethernet MAC, the DCRbus bridge in the host interface translates commands carried over the DCR bus intoEthernet MAC host bus signals. These signals are then input into one of the EthernetMACs.The DCR bus bridge contains four device control registers. The first two are used as dataregisters, each is 32 bits wide (dataRegMSW and dataRegLSW). The third is used as acontrol register (cntlReg).The fourth device control register is used as a ready status register (RDYstatus). ThePowerPC 405 processor polls this register to determine access completion status. The bitsin this register are asserted when there is no access in progress. When an access is inprogress, a bit corresponding to the type of access is automatically deasserted. The bit isautomatically reasserted when the access is complete. Alternatively, the host interface canalso provide an interrupt request to inform the host of access completion. The user canselect either the polling or the interrupt method to inform the host of access status.Figure 3-43: Address Filter Multicast Address Register Read0x38CMSWHOSTRDDATA[31:0]HOSTWRDATA[31:0]HOSTADDR[9:0]HOSTOPCODE[1]HOSTMIIMSELHOSTCLKLSWUG074_3_45_080805www.BDTIC.com/XILINX |
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