12.5.6 Operation principleThe four step directional residual overcurrent protection EF4PTOC (51N/67N) isconfigured to give input information, that is directional fault detection signals, to theECPSCH (85) logic:• Input signal PLTR_CRD is used for tripping of the communication scheme, normallythe pickup signal of a forward overreaching step of PUFW.• Input signal CS_STOP is used for sending block signal in the blockingcommunication scheme, normally thepickup signal of a reverse overreaching step ofPUREV.• Input signal CSUR is used for sending permissive signal in the underreachingpermissive communication scheme, normally the pickup signal of a forwardunderreaching step of STINn, where n corresponds to the underreaching step.• Input signal CSOR is used for sending permissive signal in the overreachingpermissive communication scheme, normally the pickup signal of a forwardoverreaching step of STINn, where n corresponds to the overreaching step.12.5.6.1 Blocking schemeIn the blocking scheme a signal is sent to the other line end if the directional elementdetects a ground fault in the reverse direction. When the forward directional elementoperates, it trips after a short time delay if no blocking signal is received from the oppositeline end. The time delay tCoord, normally 30–40 ms, depends on the remote reverse unitoperating and communication transmission times and a chosen safety margin.One advantage of the blocking scheme is that only one channel (carrier frequency) isneeded if the ratio of source impedances at both end is approximately equal for zero andpositive sequence source impedances, the channel can be shared with the impedancemeasuring system, if that system also works in the blocking mode. The communicationsignal is transmitted on a healthy line and no signal attenuation will occur due to the fault.Blocking schemes are particular favorable for three-terminal applications if there is nozero-sequence outfeed from the tapping. The blocking scheme is immune to currentreversals because the received signal is maintained long enough to avoid unwantedoperation due to current reversal. There is never any need for weak-end infeed logic,because the strong end trips for an internal fault when no blocking signal is received fromthe weak end. The fault clearing time is however generally longer for a blocking schemethan for a permissive scheme.If the fault is on the line, the forward direction measuring element operates. If no blockingsignal comes from the other line end via the CR binary input (received signal) the TRIPoutput is activated after the tCoord set time delay.1MRK 506 335-UUS A Section 12Scheme communication519Technical manual
