Enhanced Queued Analog-to-Digital Converter (EQADC)MPC5644A Microcontroller Reference Manual, Rev. 6Freescale Semiconductor 101125.4.2 Detailed signal descriptions25.4.2.1 AN0/DAN0+ — Single-ended analog input/Differential analog inputpositive terminalAN0 is a single-ended analog input to the two on-chip ADCs. DAN0+ is the positive terminal of thedifferential analog input DAN0 (DAN0+ - DAN0-).25.4.2.2 AN1/DAN0— — Single-ended analog input/Differential analog inputnegative terminalAN1 is a single-ended analog input to the two on-chip ADCs. DAN0- is the negative terminal of thedifferential analog input DAN0 (DAN0+ - DAN0-).25.4.2.3 AN2/DAN1+ — Single-ended analog input/Differential analog inputpositive terminalAN2 is a single-ended analog input to the two on-chip ADCs. DAN1+ is the positive terminal of thedifferential analog input DAN1 (DAN1+ - DAN1-).AN39 Input Single-ended analog input — AnalogMA0 Output External multiplexer control signal 0 DigitalMA1 Output External multiplexer control signal 0 DigitalMA2 Output External multiplexer control signal 0 DigitalFCK Output EQADC SSI free running clock 0 DigitalSDS Output EQADC SSI serial data select 1 DigitalSDI Input EQADC SSI serial data in DigitalSDO Output EQADC SSI serial data out 0 DigitalVDDA Input Analog Positive Power Supply — PowerVSSA Input Analog Negative Power Supply — PowerVRH Input Voltage Reference High — PowerVRL Input Voltage Reference Low — PowerREFBYPC Input External Bypass capacitor Pin — PowerETRIG0 Input External trigger for CFIFO0 — DigitalETRIG1 Input External trigger for CFIFO1 — DigitalETRIG2 Input External trigger for CFIFO2 — DigitalETRIG3 Input External trigger for CFIFO3 — DigitalETRIG4 Input External trigger for CFIFO4 — DigitalETRIG5 Input External trigger for CFIFO5 — DigitalTable 25-1. External Signals (continued)Name Port Function Reset State Type
