External Bus Interface (EBI)MPC5644A Microcontroller Reference Manual, Rev. 6282 Freescale Semiconductor14.3.2 Detailed signal descriptionsNOTEThis section lists the superset of signals for the EBI. Refer to Section 14.1,Information Specific to This Device, for device-specific package limitationsand possible signal renaming.14.3.2.1 ADDR [3:31] — Address lines 3-31The ADDR[3:31] signals specify the physical address of the bus transaction.The 29 address lines correspond to bits 3-31 of the EBI’s 32-bit internal address bus.14.3.2.2 BDIP — Burst data in progressBDIP is asserted to indicate that the master is requesting another data beat following the current one.This signal is driven by the EBI on all EBI-mastered external burst cycles, but is only sampled by burstmode memories that have a corresponding pin. See Section 14.5.2.5, Burst transfer.14.3.2.3 CLKOUT — ClockoutCLKOUT is a general-purpose clock output signal to connect to the clock input of SDR external memoriesand in some cases to the input clock of another MCU in multi-master configurations.14.3.2.4 CAL_CS [0:3] — Calibration chip selects 0-3CAL_CSx is asserted by the master to indicate that this transaction is targeted for a particular memorybank on the Calibration external bus.The calibration chip selects are driven only by the EBI. External master accesses on the Calibration busare not supported. In all other aspects, the calibration chip-selects behave exactly as the primarychip-selects. See Section 14.5.1.3, Memory Controller with Support for Various Memory Types for detailson chip-select operation.14.3.2.5 DATA [0:31] — Data lines 0-31The DATA[0:31] signals contain the data to be transferred for the current transaction.WE[0:3]/BE[0:3] Output Write/Byte Enables Up1 This column shows which signals require a weak pullup or pulldown. The EBI block does notcontain these pullup/pulldown devices within the block. They are assumed to be in another moduleof the MCU (e.g. pads module).2 The CLKOUT signal is driven by the System Clock Block outside the EBI.3 In Address/Data multiplexing modes, Data will also show the address during the address phase.Table 14-2. Signal Properties (continued)Name I/O Type Function Pull 1
