Signal DescriptionMPC5644A Microcontroller Reference Manual, Rev. 6Freescale Semiconductor 853.2 Signal DetailsTable 2. Pad typesPad Type I/O Voltage RangeSlow 3.0V - 5.5 VMedium 3.0 V - 5.5 VFast 3.0 V - 3.6 VMultiV1,21 Multivoltage pads are automatically configured in low swing modewhen a JTAG or Nexus function is selected, otherwise they are highswing.2 VDDEH7 supply cannot be below 4.5 V when in low-swing mode.3.0 V - 5.5 V (high swing mode)3.0 V - 3.6 V (low swing mode)Analog 0.0 - 5.5 VLVDS —Table 3-3. Signal detailsSignal Module or Function DescriptionCLKOUT Clock Generation MPC5644A clock output for the external/calibration businterfaceENGCLK Clock Generation Clock for external ASIC devicesEXTAL Clock Generation Input pin for an external crystal oscillator or an external clocksource based on the value driven on the PLLREF pin at reset.PLLREF Clock GenerationReset/ConfigurationPLLREF is used to select whether the oscillator operates in xtalmode or external reference mode from reset. PLLREF=0 selectsexternal reference mode. On the 324BGA package, PLLREF isbonded to the ball used for PLLCFG[0] for compatibility withMPC55xx devices .For the 176-pin QFP and 208-ball BGA packages:0: External reference clock is selected.1: XTAL oscillator mode is selectedFor the 324 ball BGA package:If RSTCFG is 0:0: External reference clock is selected.1: XTAL oscillator mode is selected.If RSTCFG is 1, XTAL oscillator mode is selected.XTAL Clock Generation Crystal oscillator inputDSPI_B_SCK_LVDS-DSPI_B_SCK_LVDS+DSPI LVDS pair used for DSPI_B TSB mode transmission
