Frequency-modulated phase locked loop (FMPLL)MPC5644A Microcontroller Reference Manual, Rev. 6Freescale Semiconductor 579external reference, no reset or interrupts are generated. Furthermore, no reset or interrupts are generatedwhen lock is lost due to a write to the FMPLL_SYNCR in legacy mode which modifies the PREDIV orMFD fields, or a write to FMPLL_ESYNCR1 in enhanced mode which modifies the EMODE, EPREDIV,EMFD or CLKCFG[1:0] fields.17.5.5 Frequency modulationFrequency modulation uses a triangular profile as shown in Figure 17-8. The modulation frequency anddepth are set using the MODPERIOD and INCSTEP fields of the FMPLL_SYNFMMR.Figure 17-8. Triangular frequency modulationTable 17-14. Loss-of-clock interrupt requestOperating mode LOCEN11 LOCEN is the loss-of-clock enable bit in either FMPLL_SYNCR or FMPLL_ESYNCR2, depending on theFMPLL_ESYNCR1[EMODE].LOCIRQ22 LOCIRQ is the loss-of-clock interrupt enable bit in either FMPLL_SYNCR or FMPLL_ESYNCR2, depending on theFMPLL_ESYNCR1[EMODE].Interrupt requestReferencefailure FMPLL failureBypass mode with external reference and PLL off — — — —Bypass mode with crystal reference and PLL off — — No —Bypass mode with external reference and PLL running — — — —Bypass mode with crystal reference and PLL running — — No —Normal mode with external reference 0 — — No1 0 — No1 1 — YesNormal mode with crystal reference 0 — No No1 0 No No1 1 Yes Yes2 x MDMDf sysf sysCenter SpreadDown Spreadfsys = PLL nominal frequencyMD = Modulation depth percentage
