Enhanced Direct Memory Access Controller (eDMA)MPC5644A Microcontroller Reference Manual, Rev. 6176 Freescale SemiconductorFigure 8-26. eDMA operation, Part 38.5 Initialization / Application information8.5.1 eDMA initializationA typical initialization of the eDMA has the following sequence:1. Write the EDMA_CR if a configuration other than the default is desired.2. Write the channel priority levels into the EDMA_CPRn registers if a configuration other than thedefault is desired.3. Enable error interrupts in the EDMA_EEIRL and/or EDMA_EEIRH registers if desired.4. Write the 32-byte TCD for each channel that may request service.5. Enable any hardware service requests via the EDMA_ERQRH and/or EDMA_ERQRL registers.6. Request channel service by software (setting bit EDMA_TCD[START]) or by hardware (slavedevice asserting its DMA peripheral request signal).After any channel requests service, a channel is selected for execution based on the arbitration and prioritylevels written into the programmer's model. The DMA engine reads the entire TCD, including the primarySlave interfaceeDMAeDMA doneSystem busSlave write dataSlave write addressBus write dataSlave read dataBus addresseDMA engineTCD0TCDn – 1*eDMA peripheralBus read datarequestSRAMTransfer control descriptor(TCD)SRAMData path Addresspath ControlProgram model/channel arbitration*n = 32 (64 for eDMA) channels
