FlexCAN ModuleMPC5644A Microcontroller Reference Manual, Rev. 61422 Freescale Semiconductor32.5.2 Transmit processIn order to transmit a CAN frame, the CPU must prepare a Message Buffer for transmission by executingthe following procedure:• If the message buffer is active (transmission pending), write ‘1000’ to the Code field to inactivatethe message buffer.The deactivated message buffer can transmit without setting IFLAG andwithout updating the CODE field (see Section 32.5.6.2, Message buffer deactivation).• Write the ID word.• Write the data bytes.• Write the Length, Control and Code fields of the Control and Status word to activate the messagebuffer.Once the message buffer is activated in the fourth step, it will participate into the arbitration process andeventually be transmitted according to its priority. At the end of the successful transmission, the value ofthe Free Running Timer is written into the Time Stamp field, the Code field in the Control and Status wordis updated, a status flag is set in the Interrupt Flag Register and an interrupt is generated if allowed by thecorresponding Interrupt Mask Register bit. The new Code field after transmission depends on the code thatwas used to activate the message buffer in step four (see Table 32-5 and Table 32-6 in Section 32.4.3,Message buffer structure). When the Abort feature is enabled (MCR[AEN] is asserted), after the InterruptFlag is asserted for a message buffer configured as transmit buffer, the message buffer is blocked, thereforethe CPU is not able to update it until the Interrupt Flag be negated by CPU. It means that the CPU mustclear the corresponding IFRL or IFRH register before starting to prepare this message buffer for a newtransmission or reception.32.5.3 Arbitration processThe arbitration process is an algorithm executed by the MBM that scans the whole message buffer memorylooking for the highest priority message to be transmitted. All message buffers programmed as transmitbuffers will be scanned to find the lowest ID1 or the lowest MB number or the highest priority, dependingon bits CR[LBUF] and MCR[LPRIO_EN]. The arbitration process is triggered in the following events:• During the CRC field of the CAN frame• During the error delimiter field of the CAN frame• During Intermission, if the winner message buffer defined in a previous arbitration wasdeactivated, or if there was no message buffer to transmit, but the CPU wrote to the C/S word ofany message buffer after the previous arbitration finished• When MBM is in Idle or Bus Off state and the CPU writes to the C/S word of any message buffer• Upon leaving Freeze ModeWhen CR[LBUF] is asserted, MCR[LPRIO_EN] has no effect and the lowest number buffer is transmittedfirst. When CR[LBUF] and MCR[LPRIO_EN] are both negated, the message buffer with the lowest ID istransmitted first but if CR[LBUF] is negated and MCR[LPRIO_EN] is asserted, the PRIO bits augmentthe ID used during the arbitration process. With this extended ID concept, arbitration is done based on thefull 32-bit ID and the PRIO bits define which message buffer should be transmitted first, therefore message1. Actually, if CR[LBUF] is negated, the arbitration considers not only the ID, but also the RTR and IDE bits placed inside theID at the same positions they are transmitted in the CAN frame.
