FlexRay Communication Controller (FlexRay)MPC5644A Microcontroller Reference Manual, Rev. 6Freescale Semiconductor 1619For a shutdown the application shall perform the following tasks:1. Disable all enabled message buffers.a) Repeatedly write ‘1’ to FR_MBCCSRn[EDT] until FR_MBCCSRn[EDS] == 0.2. Stop Protocol Engine.a) Issue HALT command via Protocol Operation Control Register (FR_POCR)b) Wait for POC:halt in Protocol Status Register 0 (FR_PSR0)33.7.6 Number of usable message buffersThis section describes the required minimum CHI clock frequency for a specified number of utilizedmessage buffers configured in the Message Buffer Segment Size and Utilization Register(FR_MBSSUTR), a configured minislot length gdMinislot, and a configured nominal macrotick lengthgdMacrotick1.Additional constraints for the minimum CHI clock frequency are given in Section 33.3, Controller hostinterface clocking”.The CC uses a sequential search algorithm to determine the individual message buffer assigned orsubscribed to the next slot. This search is started at the start of slot and must be finished before the start ofthe next slot.The shortest FlexRay slot is an corrected empty dynamic slot. An corrected empty dynamic slot is aminislot and consists of gdMinislot corrected macroticks with a duration of gdMacrotick. The minimumduration of an corrected macrotick is gdMacrotickmin = 39 μT. This results in a minimum length of ancorrect slotEqn. 33-30The message buffer search engine runs on the CHI clock and evaluates one individual message buffer perCHI clock cycle. For internal status update operations and to account for clock domain crossing jitter, anadditional amount of 10 CHI clock cycles is required to ensure correct search engine operation.For a given number of utilized message buffers FR_MBSSUTR[LAST_MB_UTIL] + 1 and for a givenCHI clock frequency fchi, this results in a search duration ofEqn. 33-31The message buffer search must be finished within one slot which requires that Equation 33-32 must befulfilled:Eqn. 33-32This results in the formula given in Equation 33-33 which determines the required minimum CHIfrequency for a given number of message buffers that are utilized.Eqn. 33-331. See Section 33.3, Controller host interface clocking” for all constraints of minimum CHI clock frequency.slotmin 39 pdMicrotick gdMinislot =search1f chi-------- FR_MBSSUTR[LAST_MB_UTIL]+10 =search slotminf chiFR_MBSSUTR[LAST_MB_UTIL]+10 39 pdMicrotick gdMinislot ----------------------------------------------------------------------------------------------------
