• When transmitting multiple frames in this mode, the user software must ensure thatthe last frame has the PUSHR[CONT] bit deasserted in Master mode and the usersoftware must provide sufficient frames in the TX_FIFO to be sent out in Slave modeand the master deasserts the PCSn at end of transmission of the last frame.• PUSHR[CONT] must be deasserted before asserting MCR[HALT] in master mode.This will make sure that the PCSn signals are deasserted. Asserting MCR[HALT]during continuous transfer will cause the PCSn signals to remain asserted and henceSlave Device cannot transition from Running to Stopped state.NOTEUser must fill the TX FIFO with the number of entries that willbe concatenated together under one PCS assertion for bothmaster and slave before the TX FIFO becomes empty.When operating in Slave mode, ensure that when the last entryin the TX FIFO is completely transmitted, that is, thecorresponding TCF flag is asserted and TXFIFO is empty, theslave is deselected for any further serial communication;otherwise, an underflow error occurs.45.4.5 Continuous Serial Communications ClockThe module provides the option of generating a Continuous SCK signal for slaveperipherals that require a continuous clock.Continuous SCK is enabled by setting the CONT_SCKE bit in the MCR. Enabling thisbit generates the Continuous SCK only if MCR[HALT] bit is low. Continuous SCK isvalid in all configurations.Continuous SCK is only supported for CPHA=1. Clearing CPHA is ignored if theCONT_SCKE bit is set. Continuous SCK is supported for Modified Transfer Format.Clock and transfer attributes for the Continuous SCK mode are set according to thefollowing rules:• When the module is in SPI configuration, CTAR0 is used initially. At the start ofeach SPI frame transfer, the CTAR specified by the CTAS for the frame is used.• In all configurations, the currently selected CTAR remains in use until the start of aframe with a different CTAR specified, or the Continuous SCK mode is terminated.Chapter 45 Serial Peripheral Interface (SPI)K22F Sub-Family Reference Manual, Rev. 4, 08/2016NXP Semiconductors 1169
