Section number Title Page20.3.1 Access support............................................................................................................................................. 412Chapter 21Direct Memory Access Multiplexer (DMAMUX)21.1 Introduction...................................................................................................................................................................41321.1.1 Overview...................................................................................................................................................... 41321.1.2 Features........................................................................................................................................................ 41421.1.3 Modes of operation...................................................................................................................................... 41421.2 External signal description............................................................................................................................................41521.3 Memory map/register definition................................................................................................................................... 41521.3.1 Channel Configuration register (DMAMUX_CHCFGn)............................................................................ 41621.4 Functional description...................................................................................................................................................41721.4.1 DMA channels with periodic triggering capability......................................................................................41721.4.2 DMA channels with no triggering capability...............................................................................................41921.4.3 Always-enabled DMA sources.................................................................................................................... 42021.5 Initialization/application information........................................................................................................................... 42121.5.1 Reset.............................................................................................................................................................42121.5.2 Enabling and configuring sources................................................................................................................421Chapter 22Enhanced Direct Memory Access (eDMA)22.1 Introduction...................................................................................................................................................................42522.1.1 eDMA system block diagram...................................................................................................................... 42522.1.2 Block parts................................................................................................................................................... 42622.1.3 Features........................................................................................................................................................ 42722.2 Modes of operation....................................................................................................................................................... 42822.3 Memory map/register definition................................................................................................................................... 42922.3.1 TCD memory............................................................................................................................................... 42922.3.2 TCD initialization........................................................................................................................................ 42922.3.3 TCD structure...............................................................................................................................................42922.3.4 Reserved memory and bit fields...................................................................................................................430K22F Sub-Family Reference Manual, Rev. 4, 08/2016NXP Semiconductors 15