VALTL voltage reference pair may select additional external pins or internal sourcesdepending on MCU configuration. See the chip configuration information on the VoltageReferences specific to this MCU.In some packages, VREFH is connected in the package to VDDA and VREFL to VSSA. Ifexternally available, the positive reference(s) may be connected to the same potential asVDDA or may be driven by an external source to a level between the minimum RefVoltage High and the VDDA potential. VREFH must never exceed VDDA. Connect theground references to the same voltage potential as VSSA.34.2.4 Analog Channel Inputs (ADx)The ADC module supports up to 24 single-ended analog inputs. A single-ended input isselected for conversion through the SC1[ADCH] channel select bits when SC1n[DIFF] islow.34.2.5 Differential Analog Channel Inputs (DADx)The ADC module supports up to four differential analog channel inputs. Each differentialanalog input is a pair of external pins, DADPx and DADMx, referenced to each other toprovide the most accurate analog to digital readings. A differential input is selected forconversion through SC1[ADCH] when SC1n[DIFF] is high. All DADPx inputs may beused as single-ended inputs if SC1n[DIFF] is low. In certain MCU configurations, someDADMx inputs may also be used as single-ended inputs if SC1n[DIFF] is low. For ADCconnections specific to this device, see the chip-specific ADC information.34.3 Memory map and register definitionsThis section describes the ADC registers.ADC memory mapAbsoluteaddress(hex)Register name Width(in bits) Access Reset value Section/page4002_7000 ADC Status and Control Registers 1 (ADC1_SC1A) 32 R/W 0000_001Fh 34.3.1/7684002_7004 ADC Status and Control Registers 1 (ADC1_SC1B) 32 R/W 0000_001Fh 34.3.1/7684002_7008 ADC Configuration Register 1 (ADC1_CFG1) 32 R/W 0000_0000h 34.3.2/7724002_700C ADC Configuration Register 2 (ADC1_CFG2) 32 R/W 0000_0000h 34.3.3/7734002_7010 ADC Data Result Register (ADC1_RA) 32 R 0000_0000h 34.3.4/774Table continues on the next page...Memory map and register definitionsK22F Sub-Family Reference Manual, Rev. 4, 08/2016766 NXP Semiconductors
