Table 19-1. How the Crossbar Switch grants control of a slave port to a master (continued)When Then the Crossbar Switch grants control to therequesting master• The current master is running an undefined length bursttransfer.• The requesting master's priority level is higher than thatof the current master.The requesting master's priority level is lower than the currentmaster.At the conclusion of one of the following cycles:• An IDLE cycle• A non-IDLE cycle to a location other than the currentslave port19.3.2.2 Round-robin priority operationWhen operating in round-robin mode, each master is assigned a relative priority based onthe master port number. This relative priority is compared to the master port number (ID)of the last master to perform a transfer on the slave bus. The highest priority requestingmaster becomes owner of the slave bus at the next transfer boundary. Priority is based onhow far ahead the ID of the requesting master is to the ID of the last master.After granted access to a slave port, a master may perform as many transfers as desired tothat port until another master makes a request to the same slave port. The next master inline is granted access to the slave port at the next transfer boundary, or possibly on thenext clock cycle if the current master has no pending access request.As an example of arbitration in round-robin mode, assume the crossbar is implementedwith master ports 0, 1, 4, and 5. If the last master of the slave port was master 1, andmaster 0, 4, and 5 make simultaneous requests, they are serviced in the order: 4 then 5then 0.The round-robin arbitration mode generally provides a more fair allocation of theavailable slave-port bandwidth (compared to fixed priority) as the fixed master prioritydoes not affect the master selection.19.4 Initialization/application informationNo initialization is required for the crossbar switch. See the chip-specific crossbar switchinformation for the reset state of the arbitration scheme.Initialization/application informationK22F Sub-Family Reference Manual, Rev. 4, 08/2016410 NXP Semiconductors
