174 www.xilinx.com Virtex-4 RocketIO MGT User GuideUG076 (v4.1) November 2, 2008Chapter 6: Analog and Board Design Considerations RSelectIO-to-MGT CrosstalkSince it is possible that MGT performance can degrade in an environment flooded withSelectIO™ activity, it is important to have guidelines for SelectIO usage which minimizethe impact on MGT performance.Although the Virtex-4 FX package itself exhibits little package-related crosstalk issues, thepinout of the device might lead to customer designs becoming susceptible to PCB-via-related crosstalk issues. The near proximity of SelectIO signals (aggressor) to MGT analogsupplies (victim) results in their PCB via structures being placed in close proximity as well.This BGA adjacency and resulting via adjacency creates a via-coupling region between theSelectIO and the MGT analog supplies that is not accounted for by on-board power supplyfiltering. The amount of crosstalk voltage induced on the victim circuit by the aggressorcircuit is equal to the rate of change of current in the aggressor times the mutual inductanceshared between the two circuits. For an in-depth discussion on via crosstalk andcalculations of mutual inductance for various via configurations, please refer to High-SpeedSignal Propagation: Advanced Black Magic by Howard Johnson and Martin Graham. Thesensitivity of the MGT analog supplies to coupled noise from the PCB results in adegradation of MGT performance. To minimize the impact on MGT performance, considerthe following list of BGA adjacency guidelines:• Avoid utilizing SelectIO nets 1.0 mm or 1.4 mm away from MGT analog power supplypins. Ground these SelectIO locations in the PCB, and set the SelectIO output tohighest drive and a forced-Low setting.• If these SelectIO outputs must be used, use them for static control/status signals, low-speed/low-drive, or differential signaling applications.• If these SelectIO pins must be used for higher drive/higher speed applications, applypower to the MGT analog supplies with a plane or wide buses a few layers below thetop of the board. Using a blind via to the MGT analog supplies is better than using athrough via.• If a through via to supply the MGT analog supply pins must be used, use an upperlayer to supply analog power to these vias. Route SelectIO nets in the uppermost layeravailable after MGT signal and MGT analog supply routing is implemented.• If supplying MGT power from the bottom of the board, route these SelectIO nets inthe highest available routing layer.The absolute worst-case scenario would be to supply MGT analog supplies from thebottom of the board and have all adjacent SelectIO outputs running at high drive/highspeed and routed to lower routing layers. For more information, please refer to “BGAEscape Example” in the BGA Escape Example section of Chapter 12 for information onescaping of SIO adjacent to MGT analog supply pins.SelectIO having the largest impact on MGT performance are those whose solder balls areadjacent to MGT analog supply solder balls (BGA Adjacency) and those that have packagecore vias adjacent to analog supply package core vias (Core Via). Table 6-3 throughTable 6-5 provide the RocketIO MGT user with pin-specific guidance recommendations tooptimize MGT performance in the presence of SelectIO switching. Specifically, the tablesidentify those pins which are either 1.0 mm or 1.4 mm away from an MGT analog supplypin. If a pin is both 1.0 mm and 1.4 mm away from two different MGT analog supply pins,then it is only listed in the 1.0 mm column. In addition, the table also lists those pins whichhave package core vias which are adjacent to analog supply package core vias.
