Virtex-4 RocketIO MGT User Guide www.xilinx.com 177UG076 (v4.1) November 2, 2008High-Speed Serial Trace DesignRAll signal traces must have an intact reference plane beneath them. Stripline andmicrostrip geometries can be used. The reference plane should extend no less than fivetrace widths to either side of the trace to ensure predictable transmission line behavior.Routing of a differential pair is optimally done in a point-to-point fashion, ideallyremaining on the same PCB routing layer. As vias represent an impedance discontinuity,layer-to-layer changes should be avoided wherever possible. It is acceptable to traverse thePCB stackup to reach the transmitter and receiver package pins. If serial traces mustchange layers, care must be taken to ensure an intact current return path. For this reason,high-speed serial traces should be routed on signal layers that share a reference plane. Ifboth reference layers are DC-coupled (if they are both ground), they can be connected withvias close to where the signals change layers. Also, vias introduce stub effects whenrouting to internal layers. It is recommended that the entire via length be used by routingto outer layers. This becomes more important at higher data rates.To control crosstalk, serial differential traces should be spaced at least five trace separationwidths from all other PCB routes, including other serial pairs. A larger spacing is requiredif other PCB routes carry noisy signals, such as TTL and other similarly noisy standards.The MGT is designed to function up to 6.5 Gb/s through more than 46 inches of FR4 withtwo high-bandwidth connectors. Longer trace lengths require use of a low-loss dielectric(for example, Rogers 4350 can essentially double the transmission distance compared toFR4). Longer traces are also supported at lower data rates; for example, data at 3.125 Gb/scan be transmitted reliably over much more than 46 inches of FR4 and two high-bandwidth connectors.Differential Trace DesignThe characteristic impedance of a pair of differential traces depends not only on theindividual trace dimensions, but also on the spacing between them. The MGTs require a100Ω differential trace impedance. A field solver should be used to determine the exacttrace geometry suited to the specific application (Figure 6-14). This task should not be leftup to the PCB vendor. Differential impedance of traces on the finished PCB should beverified with Time Domain Reflectometry (TDR) measurements.If it is necessary to separate the traces to connect to an AC coupling capacitor or connector,it can be helpful to modify the trace geometry in the vicinity of the obstacle (Figure 6-15) tocorrect for the impedance discontinuity (increase the individual trace width where traceseparation occurs). Figure 6-16 and Figure 6-17 show examples of PCB geometries thatresult in 100Ω differential impedance.Figure 6-14: Single-Ended Trace Geometryug035_ch4_19_022703TraceReference PlaneDielectricWHW = 7.9 mil (0.201 mm)H = 5.0 mil (0.127 mm)Z 0 = 50ΩEr = 4.3
