76 www.xilinx.com Virtex-4 RocketIO MGT User GuideUG076 (v4.1) November 2, 2008Chapter 2: Clocking, Timing, and Resets RCommon MGT Clocking Use CasesFigure 2-9 and Figure 2-10 show the common clocking use models that the MGT supports.Note: TXOUTCLK1/TXOUTCLK2 / RXRECCLK1/RXRECCLK2 connect to local and regionalclocking. A connection of these clocks to BUFG is possible with the use of fabric interconnect.Figure 2-9: Low-Latency ClockingTXUSRCLKTXUSRCLK2TXDATATXCHARDISPMODETXCHARDISPVALTXCHARISKUser DATARXDATARXCHARISCOMMARXRUNDISPRXCHARISKETC.REFCLKRXRECCLK1Reference ClockUser DATAsynchronous torecovered clockETC.RXUSRCLKRXUSRCLK2TXOUTCLK1The PMA has parallel clock dividersthat can provide TXOUTCLK1 to the1-byte, 2-byte, or 4-byte USRCLK2PCS has internal dividersto generate the /1, /2, or/4 USRCLKs.No latencyrequirement to regionalor global clock treesince phase alignment is handled in MGT.The PMA has parallel clockdividers that can provideRXRECCLK1 to the 1-byte,2-byte,or 4-byte USRCLK2.TX Fabric LogicRX Fabric LogicGT11ug076_ch2_10_061507BUFR(1)BUFR(1)Notes: 1. BUFG connect is possible with TXOUTCLK1 or RXRECCLK1 with the use of fabric interconnect.
