252 www.xilinx.com Virtex-4 RocketIO MGT User GuideUG076 (v4.1) November 2, 2008Chapter 11: Design of Transitions RMicrostrip/Stripline BendsA bend in a PCB trace is considered a transition. When routing differential traces througha 90° corner, the outer trace is longer than the inner trace, which introduces P/Nimbalance. Even within a single trace, signal current has the tendency to hug the insidetrack of a corner, further reducing the actual delay through a bend.To minimize skew between the P and N paths, 90° turns in microstrips or striplines arerouted as two 45° bends to give mitered corners. The addition of a jog-out also allows thetrace lengths to be matched. Figure 11-13 shows example bends in traces.Turns add capacitance because the trace at a 90° corner is 41% wider. That difference isreduced to 8% with a 45° turn. The addition of plane cutouts acts to reduce this amount ofexcess capacitance. Plane cut-outs are difficult to implement and offer only a little betterperformance than just using a jog-out. Therefore, only consider cut-outs when using verywide lines, where the effect of capacitive corners is much more pronounced. It is veryimportant to note that the traces are not widened to maintain a 50Ω differential impedancealong the jog-out region. The tendency is to widen differential traces that are separated, butthis technique should not be applied to jog-outs.When this mitered bend is simulated with the jog-out and plane cutouts, excesscapacitance is reduced and P/N length and phase matching is improved. Without jog-outs,the P/N length mismatch is 25 mils for a signal-pair pitch of 16 mils. Given FR4 material,the 25 mil difference translates to a phase mismatch of 7.8° at 5 GHz, or 4.36 ps (0.0436 UI)at 10 Gb/s. This phase difference scales linearly with data rate, so for 5 Gb/s each turnresults in 3.9°, or 0.0218 UI.Figure 11-14 shows the simulated P/N response to a differential TDR; the negativereflection confirms that the mitered corners have excess capacitance. In this case, bothconfigurations show that plane cut-outs offer a small amount of capacitance reduction.The 40/60 rule of thumb can be used to estimate the excess capacitance from Figure 11-15,showing an SDD11 of –35 dB at 1 GHz equates to roughly 105 fF of excess capacitance.Again, there is only a slight improvement of less than 1 dB (~10% less capacitance) byusing the cutouts with the jog-outs.Designers are tempted to widen lines to compensate for the characteristic impedanceincrease as the lines are separated and couple less strongly. However, even withoutwidening the lines, the characteristics of the corners and jog-outs are still overly capacitive;therefore, the uncoupled section of the jog-out must not be widened.Figure 11-13: Example Design for 90 Degree Bends in TracesTwo45°TurnsPlaneCut-Outs Jog-OutUG072_c3_21_082905
