Xilinx Virtex-4 RocketIO User Manual

Also see for Virtex-4 RocketIO: Configuration user guide User guide

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Xilinx Virtex-4 RocketIO User Manual Manual pdf 81 page image

Virtex-4 RocketIO MGT User Guide www.xilinx.com 81UG076 (v4.1) November 2, 2008Setting the Clocking OptionsRFIFigure 2-12 (Cont’d): Transmit Clocking Decision Flow (Page 2 of 2)ProvideUSRCLK(6)externally?1 -byte fabricinterface2 -byte fabricinterfaceTX _ CLOCK _ DIVIDER= 00 = 10 = 01 = 11NONONOYESYESYES 4 -byte fabricinterfaceIs it a 1-byte fabricinterface? (4)2-byte fabricinterface (4)4-byte fabricinterfaceNONONOYESYESYES 8-byte fabricinterface (5)TXASYNCDIVIDE= 00 = 01 = 10 = 10DONE with TXsettingsLow latency mode?(2)(3)(cont's from previous page)ug076_ch2_09b_072607YESNOTX_CLOCK_DIVIDER = 00TXCLK0_FORCE_PMACLK = TRUETXCLK0_FORCE_PMACLK = TRUETXCLK0_FORCE_PMACLK = FALSE