3.18 Combination instructions (Bit)Examining the signal state of the addressed instruction and gating the result with the RLOaccording to the appropriate logic function.Com-mandOperand Parameter Function Lengthin wordsA AND operation at signal state "1"I/Q a.b 0.0 ... 2047.7 Input/output 1/2M a.b 0.0 ... 8191.7 Bit memory 1/2L a.b parameterizable Local data bit 2DBX a.b 0.0 ... 65535.7 Data bit 2DIX a.b 0.0 ... 65535.7 Instance data bit 2c [AR1,m] register-indirect, area-internal (AR1) 2c [AR2,m] register-indirect, area-internal (AR2) 2[AR1,m] area-crossing (AR1) 2[AR2,m] area-crossing (AR2) 2Parameter via parameters 2AN AND operation of signal state "0"I/Q a.b 0.0 ... 2047.7 Input/output 1/2M a.b 0.0 ... 8191.7 Bit memory 1/2L a.b parameterizable Local data bit 2DBX a.b 0.0 ... 65535.7 Data bit 2DIX a.b 0.0 ... 65535.7 Instance data bit 2c [AR1,m] register-indirect, area-internal (AR1) 2c [AR2,m] register-indirect, area-internal (AR2) 2[AR1,m] area-crossing (AR1) 2[AR2,m] area-crossing (AR2) 2Parameter via parameters 2Status word for: A, AN BR CC1 CC0 OV OS OR STA RLO /FCInstruction depends on - - - - - ü - ü üInstruction influences - - - - - ü ü ü 1Com-mandOperand Parameter Function Lengthin wordsO OR operation at signal state "1"I/Q a.b 0.0 ... 2047.7 Input/output 1/2M a.b 0.0 ... 8191.7 Bit memory 1/2Combination instructionswith bit operandsVIPA SPEED7 IL operationsCombination instructions (Bit)HB00 | OPL_SP7 | Operation list | en | 18-30 55
