Differential Multi-Mode Transceivers (Module D8)68C3 Operations Manual North Atlantic Industries, Inc. 12/19/2014Rev: 2014-12-19-0947 www.naii.com Page 121 of 330MUXProtectiveCircuits1Wrap-AroundTestChannelDifferentialBuffer 1StateMachineDifferential Module Block Diagram11 (16)111OUT 1IN 1DifferentialBuffer 11 (16)OUT 11 (16)IN 11 (16)IN/OUT 1IN/OUT 11 (16)Module BusUser Interface(16)DIFFERENTIAL MULTI-MODE TRANSCEIVERS (MODULE D8)Principle of OperationThis module provides 11 (or 16 with platformsutilizing 44-pin front panel connectors) individualDifferential RS422/RS485 I/O channels that areprogrammable, per channel, for either Input orOutput, and include extensive diagnostics. EachDifferential input channel has a selectable internaltermination resistor (120Ω or >96kΩ) across itsinputs. Interrupt can be selected, for each channel,to indicate transition on rising edge, transition onfalling edge, or both. De-bounce circuits for eachchannel offer a selectable time delay to eliminatefalse signals resulting from contact bouncecommonly experienced with mechanical relays and switches. All inputs are continually scanned and the data isdouble buffered for immediate availability.Automatic Background Built-In Test (BIT) / Diagnostic capabilityThe module contains automatic background BIT testing that verifies channel processing (data read or write logic),tests for over-current conditions and fault status. Any failure triggers an Interrupt (if enabled) with the resultsavailable in status registers. The testing is totally transparent to the user, requires no external programming andhas no effect on the operation of this card. It can be enabled or disabled via the bus (See further details in registerdescription), and continually checks that each channel is functional. This capability is accomplished by anadditional test comparator that is incorporated into each 11 (16) channel modules. The test comparator issequentially connected across each channel and is compared against the operational channel. Depending uponthe configuration, the Input data read or Output logic write of the operational channel and test comparator mustagree or a fault is indicated with the results available in the associated status register. Low to High and High toLow logic transitions are indicated. Additional testing of output logic indicates Over-current condition when outputlogic is invalid for a period greater than 80μs.Write OutputWhen a channel is configured for Output, write logic level High (“1”) or Low (“0”) to associated channel bit, in 16-bit binary word. Each bit corresponds to one of 11 (16) channels.REGISTER D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 ChannelWRITE OUTPUT D D D D D D D D D D D D D D D D D=DATA BITRead Input or OutputIndependent of channel configuration (Input or Output), read logic state High (“1”) or Low (“0”). Each bit of 16-bitbinary word corresponds to one of 11 (16) channels.REGISTER D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 ChannelREAD I/O D D D D D D D D D D D D D D D D D=DATA BIT
