I/O Discrete (Module K7)68C3 Operations Manual North Atlantic Industries, Inc. 12/19/2014Rev: 2014-12-19-0947 www.naii.com Page 191 of 330Read Switch Current (Average)Read averaged RMS current through the I/O pins at each channel. Value is signed binary 10 bit word, whereLSB=3mA. Read as 2’s complement; Current source is positive, Current sink is negative. For example, if outputvoltage word is 0x0064 (100d), actual current is (current source) 300mA. For negative (current sink), (-) 300mAwould read as 0xFF9C (-100d).REGISTER D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 FUNCTIONSwitch Current (averaged) 0 0 0 0 0 0 D D D D D D D D D D D=DATA BITReset Over-CurrentThere is only one Reset Over-Current register. Writing an integer “1” resets all sixteen channels. This register isused to reset disabled channel(s) that were tripped (high impedance state) following an over-current condition.Over-current condition is set at 600mA. Once the reset process is completes, processor will write a “0” back to theReset Over-Current register. Card will respond to the reset command after one second.REGISTER D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 ChannelRESET OVER-CURRENT X X X X X X X X X X X X X X X D D=DATA BITStatus IndicationsThe following status conditions can be monitored:- Fault: When the test circuit does not agree with the data read or data write a fault status bit will be set within 3seconds. A fault bit will remain latched until read.- Over-Current: If over-current or overload condition is sensed, status is indicated (bit is set) within 80μs- Max High Threshold: If the signal exceeds this threshold, status is indicated (bit is set) within 500μs- Min Low Threshold: If the signal falls below this threshold, status is indicated (bit is set) within 500μs- Lo-Hi Transition: If a Lo to High transition is sensed, status is indicated (bit is set) within 40μs- Hi-Low Transition: If a High to Low transition is sensed, status is indicated (bit is set) within 40μs- Mid-Range: When the signal is in between the Upper and Lower thresholds, status is indicated (bit set) within500μsWhen status is “indicated,” or bit is “set,” bit value is logic “1.” Reading will reset (or unlatch) Status Register.D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0Status Fault Ch.16 Ch.15 Ch.14 Ch.13 Ch.12 Ch.11 Ch.10 Ch.9 Ch.8 Ch.7 Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1Status Over-Current Ch.16 Ch.15 Ch.14 Ch.13 Ch.12 Ch.11 Ch.10 Ch.9 Ch.8 Ch.7 Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1Status Max Hi Threshold Ch.16 Ch.15 Ch.14 Ch.13 Ch.12 Ch.11 Ch.10 Ch.9 Ch.8 Ch.7 Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1Status Min Lo Threshold Ch.16 Ch.15 Ch.14 Ch.13 Ch.12 Ch.11 Ch.10 Ch.9 Ch.8 Ch.7 Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1Status Mid-Range Ch.16 Ch.15 Ch.14 Ch.13 Ch.12 Ch.11 Ch.10 Ch.9 Ch.8 Ch.7 Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1Status Lo-Hi Transition Ch.16 Ch.15 Ch.14 Ch.13 Ch.12 Ch.11 Ch.10 Ch.9 Ch.8 Ch.7 Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1Status Hi-Lo Transition Ch.16 Ch.15 Ch.14 Ch.13 Ch.12 Ch.11 Ch.10 Ch.9 Ch.8 Ch.7 Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1Interrupt EnableTo enable interrupts, set bit to ‘1’ for the corresponding channel to be monitored. Reading will reset (or unlatch)Status Register.D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0Interrupt Fault Enable Ch.16 Ch.15 Ch.14 Ch.13 Ch.12 Ch.11 Ch.10 Ch.9 Ch.8 Ch.7 Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1Interrupt Over-Current Enable Ch.16 Ch.15 Ch.14 Ch.13 Ch.12 Ch.11 Ch.10 Ch.9 Ch.8 Ch.7 Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1Interrupt Max Hi Threshold Enable Ch.16 Ch.15 Ch.14 Ch.13 Ch.12 Ch.11 Ch.10 Ch.9 Ch.8 Ch.7 Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1Interrupt Min Lo Threshold Enable Ch.16 Ch.15 Ch.14 Ch.13 Ch.12 Ch.11 Ch.10 Ch.9 Ch.8 Ch.7 Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1Interrupt Mid-Range Enable Ch.16 Ch.15 Ch.14 Ch.13 Ch.12 Ch.11 Ch.10 Ch.9 Ch.8 Ch.7 Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1Interrupt Lo-Hi Enable Ch.16 Ch.15 Ch.14 Ch.13 Ch.12 Ch.11 Ch.10 Ch.9 Ch.8 Ch.7 Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1Interrupt Hi-Lo Enable Ch.16 Ch.15 Ch.14 Ch.13 Ch.12 Ch.11 Ch.10 Ch.9 Ch.8 Ch.7 Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1
