Thermocouple Measurement (Module G3)68C3 Operations Manual North Atlantic Industries, Inc. 12/19/2014Rev: 2014-12-19-0947 www.naii.com Page 146 of 330Compensation TypeType: 16-bit binaryRange: N/ARead/Write: R/WInitialized Value: N/ASets the expected usage type (or input preference) for the junction temperature compensation (junctiontemperature of thermocouple wire and copper module I/O pin wiring) value. There are three compensation usagetypes; 1) Internal module sensor (where the junction temperature is determined by an on-board module sensor.2) External thermo-block compensation utilized (where the junction temperature is determined by sensorinterface located in the actual thermo-block) (also note, thermo-block temperature can be read from the “ExternalCompensation Temperature” register. 3) User “entry” of compensation temperature (junction temperature isdetermined by user entry (i.e. if junction temperature is available and measured by some external device, thetemperature can be written to the “External Compensation Temperature” register. (module-level, applied to allchannels).REGISTER D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 FUNCTIONCompensation Type 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D D D=DATA BITCompensation Type ASCII entry (hex conversion)0x0000 Internal module sensor used0x0001 External compensation thermo-block used0x0002 User “entry” compensation temperature usedDPRAM BusyIndicates the module is currently performing either BIT/OPEN detection or a background alignment is takingplace. A/D or Temperature data is not being updated while DPRAM BUSY is active (BUSY = ‘1’).REGISTER D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0DPRAM BUSY X X X X X X X X X X X X X X X DBIT/Open Test IntervalTime interval between successive BIT/OPEN detection tests. LSB = based upon 1 / minimum update rate (LSB =@ 239.8 ms). Writing ‘0’ to this register disables BIT/OPEN detection. During BIT/Open Interval operation, actualmeasured data will be “unavailable” and qualified with DPRAM Busy bit being set in the DPRAM Busy register.REGISTER D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0BIT/OPEN Test Interval D D D D D D D D D D D D D D D D
