High Voltage D/A (Module J8)68C3 Operations Manual North Atlantic Industries, Inc. 12/19/2014Rev: 2014-12-19-0947 www.naii.com Page 139 of 330Over Current OverrideWrite “1” to turn off over current protection. Write “0” to enable over current protection. Default value equals “0”.REGISTER D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 FUNCTIONOver Current Override D D D D D D D D D D D D D D D D D=DATA BITTest EnableSet bit to enable associated Built-In Self Test (D2) or (D3).Write “1” to (D2) to initiate automatic background BIT testing status reporting. Card will (once every second) write55h at D2 Test Verify register when D2 is enabled. User can periodically clear to 00h and then read Test (D2)verification register again, after 1 second, to verify that background bit testing is activated.The off-line (D3) test cycle, when activated, is completed within 10 seconds and results can be read from theassociated status registers when (D3) enable changes from “1” to “0”. Any failure triggers an Interrupt (if enabled).All testing requires no external programming and is initiated by writing “1” or terminated by writing “0”.CAUTION: D/A Outputs are active during D3 test. Check connected loads for interaction. D/A Over-Current (short circuit) monitoring is disabled during D3 testing.D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0TEST ENABLE X X X X X X X X X X X X D3 D2 X D0D2 Test VerifyCard will write 55h at D2 Test Verify register when (D2) is enabled (maximum 1 second). User can clear to 00hand then read again, after 1 second, to verify that background bit testing is activated.BIT StatusCheck the corresponding bit for a channel’s BIT Status. A “0” =Normal; “1” = Non-compliant D/A conversion(outside 2% FS accuracy spec). This register becomes latched when BIT detects a non-compliant status.Reading this register will cause that bit to be unlatched. BIT Status is part of background testing and the statusregister may be checked or polled at any given time.D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0BIT STATUS X X X X X X X X X X X X Ch.4 Ch.3 Ch.2 Ch.1Over Current StatusCheck the corresponding bit of the Over-Current Status register for over current draw for each active channel. A“0” =Normal; “1” = Over Current. An over current draw from the output of any D/A channel is detected within 500milliseconds. This register becomes latched when an Over Current condition occurs. Reading the Over CurrentStatus register will cause this status register to unlatch. NOTE: reading this register does not cause any outputsto be enabled; only Retry Overload or Reset Overload registers can re-enable outputs. Over Current Status is partof background testing and the status register may be checked or polled at any given time.D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0Over Current Status X X X X X X X X X X X X Ch.4 Ch.3 Ch.2 Ch.1
