ARINC 429/575 Six Channel, Tx/Rx (Module A4)68C3 Operations Manual North Atlantic Industries, Inc. 12/19/2014Rev: 2014-12-19-0947 www.naii.com Page 69 of 330Rx Match Memory LayoutType: unsigned integer wordRange: 0 to FFFFhRead/Write: R/WInitialized Value: 0The address of the Rx Match memory corresponds to the SDI/Label messages to be received and stored.A10 – A1 = Lower 10 bits of the ARINC data word where A8 is the msb and A1 is the lsb of the Label. A10 and A9are the SDI bits. This memory can be all cleared by setting the Match Memory Clear bit in the channel control highregister.Async Tx Data (Hi + Lo)Type: unsigned character wordRange: 0 to FFFFhRead/Write: R/WInitialized Value: 0This memory location is the transmit async data buffer. Data intended to be transmitted asynchronously must beplaced here prior to transmission. ARINC data words are 32-bits and are placed into the register 16 bits at a timestarting with the HI 16 bits. The Async Data Available bit in Channel Status will automatically set after the LO 16bits are written.REGISTER D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 FUNCTION0xFC ASYNC TX DATA HI D D D D D D D D D D D D D D D D D=DATA BIT0xFE ASYNC TX DATA LO D D D D D D D D D D D D D D D D D=DATA BITBIT Status RegisterType: binary wordRange: not applicableRead/Write: RInitialized Value: 0hThis register contains the Built-In-Test (BIT) status of all six channels on the module. When a BIT error isdetected, the channel’s respective bit is set to ‘1’ in this register. Reading this register clears any set bits.REGISTER D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 FUNCTIONBIT STATUS X X X X X X X X X X X X X X X 1 BUILT-IN-TEST ERROR CH1X X X X X X X X X X X X X X 1 X BUILT-IN-TEST ERROR CH2X X X X X X X X X X X X X 1 X X BUILT-IN-TEST ERROR CH3X X X X X X X X X X X X 1 X X X BUILT-IN-TEST ERROR CH4X X X X X X X X X X X 1 X X X X BUILT-IN-TEST ERROR CH5X X X X X X X X X X 1 X X X X X BUILT-IN-TEST ERROR CH6REGISTER D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 FUNCTIONRX MATCH MEMORY X X X X X X X X X X X X X X X 1 ENABLE MATCH=1