I/O Discrete (Module K6 Ver. 4)68C3 Operations Manual North Atlantic Industries, Inc. 12/19/2014Rev: 2014-12-19-0947 www.naii.com Page 184 of 330PWM/TIMER Configuration (Polarity)Sets the polarity of the pulse width (on-time) of the PWM signal period. When the polarity bit is set to “0” (default),low side, high side (w/ appropriate pull-down) and push-pull modes, the pulse width will be defined as low-going.When the polarity bit is set to “1” , high side, low side (w/ appropriate pull-up) and push-pull modes, the pulsewidth will be defined as high-going.This function is also related to “PWM/Timer Period and Pulse Width”. (See figure 1. Timing Diagram).REGISTER BIT MAPReservedReservedReservedPolarityD15D14D13D12D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0PWM/Timer Configuration(Polarity)0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DRegister Offset Description Type Power On / Reset Default Remarks0x01C0 PWM/Timer Config. (Polarity), CH1 W/R 0x00000x01C2 PWM/Timer Config. (Polarity), CH2 W/R 0x00000x01C4 PWM/Timer Config. (Polarity), CH3 W/R 0x00000x01C6 PWM/Timer Config. (Polarity), CH4 W/R 0x00000x01C8 PWM/Timer Config. (Polarity), CH5 W/R 0x00000x01CA PWM/Timer Config. (Polarity), CH6 W/R 0x00000x01CC PWM/Timer Config. (Polarity), CH7 W/R 0x00000x01CE PWM/Timer Config. (Polarity), CH8 W/R 0x00000x01D0 PWM/Timer Config. (Polarity), CH9 W/R 0x00000x01D2 PWM/Timer Config. (Polarity), CH10 W/R 0x00000x01D4 PWM/Timer Config. (Polarity), CH11 W/R 0x00000x01D6 PWM/Timer Config. (Polarity), CH12 W/R 0x00000x01D8 PWM/Timer Config. (Polarity), CH13 W/R 0x00000x01DA PWM/Timer Config. (Polarity), CH14 W/R 0x00000x01DC PWM/Timer Config. (Polarity), CH15 W/R 0x00000x01DE PWM/Timer Config. (Polarity), CH16 W/R 0x0000PWM/TIMER Mode SelectSets output channel mode operation – either standard (responds to the standard ‘write output’ control) orPWM/Timer mode ‘automatic’ pulse output based on PWM/Timer initialization registers. Bit mapped per channel.When channel bit is set to “0” (default), the “respective channel will respond to ‘standard’ write output control.When channel bit is set to “1”, the respective channel will respond to PWM/Timer control pattern programmedaccordingly.REGISTER BIT MAPD15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0PWM/Timer ModeSelectCh.16 Ch.15 Ch.14Ch.131Ch.12Ch.11Ch.10 Ch.9 Ch.8 Ch.71Ch.6 Ch.5 Ch.4 Ch.3 Ch.2 Ch.1Register Offset Description Type Power On / Reset Default Remarks0x01E0 PWM/Timer Mode Select W/R 0x0000
