Chapter 6ROM CorrectionROM Correction Operation VI - 116.3 ROM Correction OperationROM correction is designed to supply the microcontroller core (CPU, DMAC) with corrected data by replacingpart of data - data read from internal ROM as a result of access by the microcontroller core (CPU, DMAC) - withthe correction data stored in a ROM correction data register, thus allowing temporary correction of programs anddata stored in internal ROM.6.3.1 ROM Correction Operation■ ROM Correction OperationWhether internal ROM access is made within the address range subject to correction (8 bytes or less from theROM correction address RCnAD) is detected by comparison between the address at which the microcontrollercore accesses internal ROM and the ROM correction address specified in the ROM correction address register(RCRnAR). In the event of detection of access to an address subject to ROM correction, the data read from theROM is replaced with the correction data set in a ROM correction data register (RCRnDR). This ROM correctionfunction comes equipped with 4 channels, each of which can correct 8 bytes of data from a desired address in theinternal ROM. Each channel has a ROM correction address register (RCRnAR) and ROM correction data register(RCRnDR) respectively to store correction address and correction data.Figure:6.3.1 ROM Correction OperationNG instructionRCRnARROMInstructionCorrection addressRCRnDRCorrection instructionInstructionInstructionInstructionNG instructionNG instructionNG instructionNG instructionNG instructionNG instructionNG instructionInstructionInstructionInstructionCorrection instructionCorrection instructionCorrection instructionCorrection instructionCorrection instructionCorrection instructionCorrection instruction
