Chapter 16AppendixXVI - 22 Instruction Set RETFRETSJSR (An)JSR labelRTSRTITRAPNOPSP + imm8(zero_ext) → SP,MDR → PC,mem32(SP-4)→ reg1,mem32(SP-8)→ reg2,mem32(SP-12)→ D0,mem32(SP-16)→ D1,mem32(SP-20)→ A0,mem32(SP-24)→ A1,mem32(SP-28)→ MDR,mem32(SP-32)→ LIR,mem32(SP-36)→ LARSP + imm8(zero_ext) → SP,MDR → PC,mem32(SP-4)→ reg1,mem32(SP-8)→ reg2,mem32(SP-12)→ reg3,mem32(SP-16)→ D0,mem32(SP-20)→ D1,mem32(SP-24)→ A0,mem32(SP-28)→ A1,mem32(SP-32)→ MDR,mem32(SP-36)→ LIR,mem32(SP-40)→ LAR,SP + imm8(zero_ext) → SP,MDR → PC,mem32(SP-4)→ D2,mem32(SP-8)→ D3,mem32(SP-12)→ A2,mem32(SP-16)→ A3,mem32(SP-20)→ D0,mem32(SP-24)→ D1,mem32(SP-28)→ A0,mem32(SP-32)→ A1,mem32(SP-36)→ MDR,mem32(SP-40)→ LIR,mem32(SP-44)→ LARmem32(SP) → PCSP - 4 → SP,PC + 2 → mem32(SP)PC + 2 → MDR,An → PC,(execute subroutine)SP + 4 → SPIF ( label = (d16,PC)),SP - 4 → SP,PC + 4 → mem32(SP),PC + 4 → MDR,PC + d16 (sign_ext) → PC(execute subroutine)SP+4 → SPIF ( label = (d32,PC)),SP - 4 → SP,PC + 6 → (SP+3),PC + 6 → MDR,PC + d32 → PC(execute subroutine)SP+4 → SPmem32(SP) → PCmem16(SP) → PSW,mem32(SP+4) → PC,SP + 8 → SPPC + 2 → mem32(SP),0x40000010 → PCPC + 1 → PC----zzz-z------zzz-z------zzz-z------zzz-z--33328101222211011105*555*4441S2D0D0D0S011101111111111111110021110000000000000101131111111111114....>11001101111056....>Group Mnemonic Operation Machine Code NotesFlag CodeSizeCycle For-matMN1030/MN103S SERIES INSTRUCTION SET7 8 9 10 11 12 13 14VF CF NF ZFRETFRETSJSRRTSRTITRAPNOPregisters specified with regs = 9registers specified with regs= 10registers specified with regs= 11*: 4 cycles for AM30*: 6 cycles for AM30
