Chapter 14A/D ConverterXIV - 22 Control Registers■ A/D1 Conversion Data Buffer 8 (AN1BUF08: 0x0000A468) [16-bit Access Register]■ A/D1 Conversion Data Buffer 9 (AN1BUF09: 0x0000A46C) [16-bit Access Register]■ A/D1 Conversion Data Buffer 0B (AN1BUF0B: 0x0000A470) [16-bit Access Register]bp 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0Flag- - - - - -AN1BUF89AN1BUF88AN1BUF87AN1BUF86AN1BUF85AN1BUF84AN1BUF83AN1BUF82AN1BUF81AN1BUF80At reset 0 0 0 0 0 0 × × × × × × × × × ×Access R R R R R R R R R R R R R R R Rbp Flag Description Setting condition15-10 - - -9-0AN1BUF89toAN1BUF80A/D1 conversion result of ADIN08 pin A/D1 conversion result of ADIN08 pinbp 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0Flag- - - - - -AN1BUF99AN1BUF98AN1BUF97AN1BUF96AN1BUF95AN1BUF94AN1BUF93AN1BUF92AN1BUF91AN1BUF90At reset 0 0 0 0 0 0 × × × × × × × × × ×Access R R R R R R R R R R R R R R R Rbp Flag Description Setting condition15-10 - - -9-0AN1BUF99toAN1BUF90A/D1 conversion results of ADIN09 pin A/D1 conversion results of ADIN09 pinbp 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0Flag- - - - - -AN1BUF0B9AN1BUF0B8AN1BUF0B7AN1BUF0B6AN1BUF0B5AN1BUF0B4AN1BUF0B3AN1BUF0B2AN1BUF0B1AN1BUF0B0At reset 0 0 0 0 0 0 × × × × × × × × × ×Access R R R R R R R R R R R R R R R Rbp Flag Description Setting condition15-10 - - -9-0AN1BUF0B9toAN1BUF0B0Conversion result of AD input pinselected with conversion channel selec-tion (AN1CH0B2-0) at trigger B genera-tion of AD1 conversion control register(AN1CTR1)Conversion result of AD input pin selected with conversion chan-nel selection (AN1CH0B2-0) at trigger B generation of AD1 con-version control register (AN1CTR1)
