Chapter 12Serial interface 0 and 1XII - 20 Operation■ Setting Data I/O Pin2 channels (data output pin (SBO pin), data input pin (SBIn pin)) are used for communication.■ Reception Data Flag OperationData is automatically stored to SCnRB from the internal shift register when the reception complete interrupt SCn-RIRQ is generated. If data is stored in the shift register SCnRB, the reception data flag SCAnRXA of the SCnSTRregister is set to “1”. This indicates that reception data is ready to be read out. SCAnRXA is cleared to “0” byreading out SCnRB data.■ Reception BUSY Flag OperationWhen a start condition is recognized, the SCAnRBSY flag of the SCnSTR register is set to “1”. It is cleared to “0”after the reception complete interrupt SCnRIRQ is generated.■ Transmission BUSY Flag OperationWhen SCnTB data is set, the SCAnTBSY flag of the SCnSTR register is set to “1”. Is is cleared to “0” after thetransmission complete interrupt SCnTIRQ is generated.■ Reception ErrorErrors at reception have 3 types, overrun error, parity error, and framing error. Reception error can be determinedby the SCAnOE, SCAnPE and SCAnFE flags of the SCnSTR register. The SCAnPE and SCAnFE flags of thereception error flags are renewed at generation of the communication complete interrupt SCnRIRQ. After readingdata of SCnRB, The SCAnOE flag is cleared at the same time when the next communication complete interruptSCnRIRQ is generated. The judgement of the reception error flag should be operated until the next communica-tion is completed. These error flags have no effects on communication operation. The reception error source isshown in the following table.Table:12.3.7 Reception Error Source of UART Serial InterfaceS■ Continuous CommunicationThis serial has no continuous transfer function. Do not set data in the transmission data buffer SCnTB duringtransmission.Flag Reception errorSCAnOE Overrun error The next data is received before the reception buffer is read.SCAnPE Parity errorFixed to 0 When parity bit is “1”Fixed to 1 When parity bit is “0”Odd parity When the total of “1” of parity bit and character bit isevenEven parity When the total of “1” of parity bit and character bit isoddSCAnFE Framing error Stop bit is not detected.
