Chapter 916-bit TimerControl registers IX - 23■ Timer 11 Mode Register (TM11MD: 0x0000A260) [8, 16-bit Access Register]bp 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0Flag TMXF- TMTGETMONETMCLETMCGETMUD1TMUD0TMCNETMLDE- - - TMCK2TMCK1TMCK0At reset 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0Access R R R/W R/W R/W R/W R/W R/W R/W R/W R R R R/W R/W R/Wbp Flag Description Setting condition15 TMXF Timer operation display 0: Timer stopping1: Timer operating14 - - -13 TMTGETimer external trigger enable 0: Timer activation disabled by external trigger (trigger input ignored)1: Timer start when the falling edge is input(when timer A pin polarity selection bit is “0”)Timer start when the rising edge is input(when timer A pin polarity selection bit is “1”)12 TMONE Timer 1-shot operation enable 0: 1-shot operation disabled (timer does not stop)1: 1-shot operation enabled (timer stops when TMBC and TMCA match)11 TMCLETimer binary counter enable 0: Clear operation disabled1: Clear operation enabledWhen the TMCA is set to a compare registerTMBC is cleared when the TMBC and the TMCA match.When the TMCA is set to a capture registerTMBC is cleared when captured to TMCA.10 TMCGETimer count control input enable 0: Count control disabled by the TMAIN pin input1: Refer to the following table.Timer A pin polarity selection bitTMAIN pin input "0" "1""L" Stop counting Counting"H" Counting Stop counting9-8 TMUD1TMUD0Up/down counting selection 00: Up counting01: Down counting10: Up counting (when “H” level is input to the TMAIN pin)Down counting (when “L” level is input the TMAIN pin)11: Up counting (when “L” level is input the TMAIN pin)Down counting (when “H” level is input to the TMAIN pin)When the 2-phase encoding (1-fold, 4-fold) is selected as the count clocksource, set “00”.7 TMCNE Timer operation enable 0: Operation disabled1: Operation enabled6 TMLDETimer initialization 0: Normal operation1: InitializationTMBC=0x0000When the TMCA and TMCB are set to the compare register of the doublebuffer, the value is loaded into the compare register from the buffer. Pinoutput is initialized.5-3 - - -2-0TMCK2TMCK1TMCK0Timer count clock source selection 000: IOCLK001: IOCLK/8010: Timer 4 underflow011: Timer 5 underflow100: 2-phase encoding (1-fold)101: 2-phase encoding (4-fold)110: TMBIN pin input (both edges)111: TMBIN pin input (single edge)When pin input (single edge) is selected by the timer, the edge selected bythe B pin polarity selection bit of the TMMDB register is counted.When using IOCLK/8, operation must be enabled by the prescaler controlregisters (TMPSCNE).
