Chapter 16AppendixXVI - 20 Instruction SetCALL labelCALLS (An)CALLS labelRETPC + 7 → mem32(SP),D2→ mem32(SP-4),D3→ mem32(SP-8),A2→ mem32(SP-12),A3→ mem32(SP-16),D0→ mem32(SP-20),D1→ mem32(SP-24),A0→ mem32(SP-28),A1→ mem32(SP-32),MDR→ mem32(SP-36),LIR→ mem32(SP-40),LAR→ mem32(SP-44)SP - imm8(zero_ext) → SP,PC + 7 → MDR,PC + d32 → PCPC + 2 → mem32(SP),PC + 2 → MDR,An → PCIF (label = (d16,PC)), PC + 4 → mem32(SP),PC + 4 → MDR, PC +d16 (sign_ext) → PCIF ((label = (d32,PC)), PC + 6 → mem32(SP),PC + 6 → MDR, PC + d32 → PCSP + imm8(zero_ext) → SP,mem32(SP) → PCSP + imm8(zero_ext) → SP,mem32(SP-4)→ reg, mem32(SP) → PCSP + imm8(zero_ext) → SP,mem32(SP-4)→ reg1,mem32(SP-8)→ reg2,mem32(SP) → PCSP + imm8(zero_ext) → SP,mem32(SP-4)→ reg1,mem32(SP-8)→ reg2,mem32(SP-12)→ reg3,mem32(SP) → PCSP + imm8(zero_ext) → SP,mem32(SP-4)→ D2,mem32(SP-8)→ D3,mem32(SP-12)→ A2,mem32(SP-16)→ A3,mem32(SP) → PCSP + imm8(zero_ext) → SP,mem32(SP-4)→ D0,mem32(SP-8)→ D1,mem32(SP-12)→ A0,mem32(SP-16)→ A1,mem32(SP-20)→ MDR,mem32(SP-24)→ LIR,mem32(SP-28)→ LAR,mem32(SP) → PCSP + imm8(zero_ext) → SP,mem32(SP-4)→ reg1,mem32(SP-8)→ D0,mem32(SP-12)→ D1,mem32(SP-16)→ A0,mem32(SP-20)→ A1,mem32(SP-24)→ MDR,mem32(SP-28)→ LIR,mem32(SP-32)→ LAR,mem32(SP) → PC--------------------------------------------7246333333314*333*5*5*5*5*589S6D0D2D4S211101111111111111110121101000010101100111131111111111114....00An11111111....>5....6................>Group Mnemonic Operation Machine Code NotesFlag CodeSizeCycle For-matMN1030/MN103S SERIES INSTRUCTION SET7............8........>....9........10....>....11....12....>....>1314....>VF CF NF ZFCALLCALLSRETIf label = (d32,PC),registersspecified with regs =11*: 5 cycles for AM30*: 4 cycles for AM30registers specified with regs =0*:4 cycles for AM30registers specified with regs =1*:4 cycles for AM30registers specified with regs =2*:4 cycles for AM30registers specified with regs =3*:4 cycles for AM30registers specified with regs =4registers specified with regs =7registers specified with regs =8
