GDU_STATREG field descriptions (continued)Field Description0 A voltage over 22 V is not detected.1 A voltage over 22 V is detected.6OVP24VOvervoltage Protection 24 VThis bit is set when a voltage over 24 V is detected. The bit is cleared by writing a logic 1 to it.0 A voltage over 24 V is not detected.1 A voltage over 24 V is detected.5–3ReservedThis field is reserved.This read-only field is reserved and always has the value 0.PHASE GDU Phase status0 Phase detector comparator is in disable mode or in the enable mode and INP < INM - (absolute valueof input offset)1 Phase detector comparator is in enable mode and INP > INM + (absolute value of input offset)25.6.28 LIMIT CMP BIAS Register (GDU_SIGBIAS)NOTEIn Scan mode, safe protection should be applied.Address: 20h base + 185Fh offset = 187FhBit 7 6 5 4 3 2 1 0Read BIASSEL 0WriteReset 0 0 0 0 0 0 0 0GDU_SIGBIAS field descriptionsField Description7BIASSELCurrent sensor Bias Voltage Selection bitNOTE: PMC VREFH is disabled by default. Customer must connect external VREFH or enable internalVREFH regulator.0 Bias voltage selected from VREFH.1 Bias voltage selected from VDDX.Reserved This field is reserved.This read-only field is reserved and always has the value 0.25.7 Functional descriptionChapter 25 Gate Drive Unit (GDU)MC9S08SU16 Reference Manual, Rev. 5, 4/2017NXP Semiconductors 461