USBx_OTGISTAT field descriptions (continued)Field Description4ReservedThis field is reserved.This read-only field is reserved and always has the value 0.3SESSVLDCHGThis bit is set when a change in VBUS is detected indicating a session valid or a session no longer valid.2B_SESS_CHGThis bit is set when a change in VBUS is detected on a B device.1ReservedThis field is reserved.This read-only field is reserved and always has the value 0.0AVBUSCHGThis bit is set when a change in VBUS is detected on an A device.35.4.6 OTG Interrupt Control Register (USBx_OTGICR)Enables the corresponding interrupt status bits defined in the OTG Interrupt StatusRegister.Address: 4007_2000h base + 14h offset = 4007_2014hBit 7 6 5 4 3 2 1 0Read IDEN ONEMSECENLINESTATEEN0 SESSVLDEN BSESSEN 0 AVBUSENWriteReset 0 0 0 0 0 0 0 0USBx_OTGICR field descriptionsField Description7IDENID Interrupt Enable0 The ID interrupt is disabled1 The ID interrupt is enabled6ONEMSECENOne Millisecond Interrupt Enable0 Diables the 1ms timer interrupt.1 Enables the 1ms timer interrupt.5LINESTATEENLine State Change Interrupt Enable0 Disables the LINE_STAT_CHG interrupt.1 Enables the LINE_STAT_CHG interrupt.4ReservedThis field is reserved.This read-only field is reserved and always has the value 0.3SESSVLDENSession Valid Interrupt Enable0 Disables the SESSVLDCHG interrupt.1 Enables the SESSVLDCHG interrupt.2BSESSENB Session END Interrupt EnableTable continues on the next page...Memory map/Register definitionsKL25 Sub-Family Reference Manual, Rev. 3, September 2012626 Freescale Semiconductor, Inc.
