Memory Map and Register DescriptionsThe SPI has 8-bit registers to select SPI options, to control baud rate, to report SPI status,to hold an SPI data match value, and for transmit/receive data.SPI memory mapAddressoffset (hex)Absoluteaddress(hex)Register name Width(in bits) Access Reset value Section/page0 4007_6000 SPI control register 1 (SPI0_C1) 8 R/W 04h 37.3.1/6611 4007_6001 SPI control register 2 (SPI0_C2) 8 R/W 00h 37.3.2/6632 4007_6002 SPI baud rate register (SPI0_BR) 8 R/W 00h 37.3.3/6643 4007_6003 SPI status register (SPI0_S) 8 R 20h 37.3.4/6655 4007_6005 SPI data register (SPI0_D) 8 R/W 00h 37.3.5/6677 4007_6007 SPI match register (SPI0_M) 8 R/W 00h 37.3.6/6680 4007_7000 SPI control register 1 (SPI1_C1) 8 R/W 04h 37.3.1/6611 4007_7001 SPI control register 2 (SPI1_C2) 8 R/W 00h 37.3.2/6632 4007_7002 SPI baud rate register (SPI1_BR) 8 R/W 00h 37.3.3/6643 4007_7003 SPI status register (SPI1_S) 8 R 20h 37.3.4/6655 4007_7005 SPI data register (SPI1_D) 8 R/W 00h 37.3.5/6677 4007_7007 SPI match register (SPI1_M) 8 R/W 00h 37.3.6/66837.3.1 SPI control register 1 (SPIx_C1)This read/write register includes the SPI enable control, interrupt enables, andconfiguration options.Address: 4007_6000h base + 0h offset = 4007_6000hBit 7 6 5 4 3 2 1 0Read SPIE SPE SPTIE MSTR CPOL CPHA SSOE LSBFEWriteReset 0 0 0 0 0 1 0 0SPI0_C1 field descriptionsField Description7SPIESPI interrupt enable: for SPRF and MODFThis bit enables the interrupt for SPI receive buffer full (SPRF) and mode fault (MODF) events.Table continues on the next page...37.3Chapter 37 Serial Peripheral Interface (SPI)KL25 Sub-Family Reference Manual, Rev. 3, September 2012Freescale Semiconductor, Inc. 661
