I2Cx_RA field descriptions (continued)Field DescriptionThis field contains the slave address to be used by the I2C module. The field is used in the 7-bit addressscheme. Any nonzero write enables this register. This register's use is similar to that of the A1 register, butin addition this register can be considered a maximum boundary in range matching mode.0ReservedThis field is reserved.This read-only field is reserved and always has the value 0.38.3.9 I2C SMBus Control and Status register (I2Cx_SMB)NOTEWhen the SCL and SDA signals are held high for a length oftime greater than the high timeout period, the SHTF1 flag sets.Before reaching this threshold, while the system is detectinghow long these signals are being held high, a master assumesthat the bus is free. However, the SHTF1 bit rises in the bustransmission process with the idle bus state.NOTEWhen the TCKSEL bit is set, there is no need to monitor theSHTF1 bit because the bus speed is too high to match theprotocol of SMBus.Address: Base address + 8h offsetBit 7 6 5 4 3 2 1 0Read FACK ALERTEN SIICAEN TCKSEL SLTF SHTF1 SHTF2 SHTF2IEWrite w1c w1cReset 0 0 0 0 0 0 0 0I2Cx_SMB field descriptionsField Description7FACKFast NACK/ACK EnableFor SMBus packet error checking, the CPU must be able to issue an ACK or NACK according to the resultof receiving data byte.0 An ACK or NACK is sent on the following receiving data byte1 Writing 0 to TXAK after receiving a data byte generates an ACK. Writing 1 to TXAK after receiving adata byte generates a NACK.6ALERTENSMBus Alert Response Address EnableEnables or disables SMBus alert response address matching.NOTE: After the host responds to a device that used the alert response address, you must use softwareto put the device's address on the bus. The alert protocol is described in the SMBus specification.Table continues on the next page...Chapter 38 Inter-Integrated Circuit (I2C)KL25 Sub-Family Reference Manual, Rev. 3, September 2012Freescale Semiconductor, Inc. 699
