UARTx_C4 field descriptions (continued)Field Description5M1010-bit Mode selectThe M10 bit causes a tenth bit to be part of the serial transmission. This bit should only be changed whenthe transmitter and receiver are both disabled.0 Receiver and transmitter use 8-bit or 9-bit data characters.1 Receiver and transmitter use 10-bit data characters.4–0OSROver Sampling RatioThis field configures the oversampling ratio for the receiver between 4x (00011) and 32x (11111). Writingan invalid oversampling ratio will default to an oversampling ratio of 16 (01111). This field should only bechanged when the transmitter and receiver are both disabled.39.2.12 UART Control Register 5 (UARTx_C5)Address: Base address + Bh offsetBit 7 6 5 4 3 2 1 0Read TDMAE 0 RDMAE 0 BOTHEDGE RESYNCDISWriteReset 0 0 0 0 0 0 0 0UARTx_C5 field descriptionsField Description7TDMAETransmitter DMA EnableTDMAE configures the transmit data register empty flag, S1[TDRE], to generate a DMA request.0 DMA request disabled.1 DMA request enabled.6ReservedThis field is reserved.This read-only field is reserved and always has the value 0.5RDMAEReceiver Full DMA EnableRDMAE configures the receiver data register full flag, S1[RDRF], to generate a DMA request.0 DMA request disabled.1 DMA request enabled.4–2ReservedThis field is reserved.This read-only field is reserved and always has the value 0.1BOTHEDGEBoth Edge SamplingEnables sampling of the received data on both edges of the baud rate clock, effectively doubling thenumber of times the receiver samples the input data for a given oversampling ratio. This bit must be set foroversampling ratios between x4 and x7 and is optional for higher oversampling ratios. This bit should onlybe changed when the receiver is disabled.Table continues on the next page...Chapter 39 Universal Asynchronous Receiver/Transmitter (UART0)KL25 Sub-Family Reference Manual, Rev. 3, September 2012Freescale Semiconductor, Inc. 737