3.5.2 OSC ConfigurationThis section summarizes how the module has been configured in the chip. For acomprehensive description of the module itself, see the module’s dedicated chapter.Signal multiplexingRegisteraccessPeripheralbridgeSystem oscillatorMCGModule signalsRTCFigure 3-15. OSC configurationTable 3-25. Reference links to related informationTopic Related module ReferenceFull description OSC OSCSystem memory map System memory mapClocking Clock distributionPower management Power managementSignal multiplexing Port control Signal multiplexingFull description MCG MCG3.5.2.1 OSC modes of operation with MCG and RTCThe most common method of controlling the OSC block is through MCG clock sourceselection MCG_C1[CLKS] and the MCG_C2 register bits to configure the oscillatorfrequency range, gain-mode, and for crystal or external clock operation. The OSC_CRalso provides control for enabling the OSC and configuring internal load capacitors forthe EXTAL and XTAL pins. See the OSC and MCG chapters for more details.The RTC_CR[OSCE] bit has overriding control over the MCG and OSC_CR enablefunctions. When RTC_CR[OSCE] is set, the OSC is configured for low frequency, lowpower and the RTC_CR[SCxP] bits override the OSC_CR[SCxP] bits to control theinternal capacitance configuration. See the RTC chapter for more details.Chapter 3 Chip ConfigurationKL25 Sub-Family Reference Manual, Rev. 3, September 2012Freescale Semiconductor, Inc. 71
