38.4 Functional descriptionThis section provides a comprehensive functional description of the I2C module.38.4.1 I2C protocolThe I2C bus system uses a serial data line (SDA) and a serial clock line (SCL) for datatransfers. All devices connected to it must have open drain or open collector outputs. Alogic AND function is exercised on both lines with external pull-up resistors. The valueof these resistors depends on the system.Normally, a standard instance of communication is composed of four parts:1. START signal2. Slave address transmission3. Data transfer4. STOP signalThe STOP signal should not be confused with the CPU STOP instruction. The followingfigure illustrates I2C bus system communication.S C LS D AD 0D a ta B y teN e w C a llin g A d d r e s sX XW r iteC a llin g A d d r e s sW r ite W r it eS D AC a llin g A d d r e s s R e a d /X X X D 7 D 6 D 5 D 4 D 3 D 2 D 1A D 6 A D 5A D 7 A D 4L S BM S B1 62 5 83 4 7 9 1 62 5 83 4 7 9L S BM S B1 62 5 83 4 7 9L S BM S B1 62 5 83 4 7 9L S BM S BA D 6 R / WA D 3 A D 2 A D 1A D 5A D 7 A D 4 A D 6 R / WA D 3 A D 2 A D 1A D 5A D 7 A D 4R e a d / R e a d /R / WA D 3 A D 2 A D 1SCLStart Signal AckBitNoAckBitStopSignalStartSignalAckBitRepeatedStartSignalNoAckBitStopSignalFigure 38-38. I2C bus transmission signalsFunctional descriptionKL25 Sub-Family Reference Manual, Rev. 3, September 2012702 Freescale Semiconductor, Inc.
