Section number Title Page11.2.2 Modes of operation......................................................................................................................................17611.3 External signal description............................................................................................................................................17611.4 Detailed signal description............................................................................................................................................17711.5 Memory map and register definition.............................................................................................................................17711.5.1 Pin Control Register n (PORTx_PCRn).......................................................................................................18311.5.2 Global Pin Control Low Register (PORTx_GPCLR)..................................................................................18511.5.3 Global Pin Control High Register (PORTx_GPCHR).................................................................................18611.5.4 Interrupt Status Flag Register (PORTx_ISFR)............................................................................................18611.6 Functional description...................................................................................................................................................18711.6.1 Pin control....................................................................................................................................................18711.6.2 Global pin control........................................................................................................................................18811.6.3 External interrupts........................................................................................................................................188Chapter 12System integration module (SIM)12.1 Introduction...................................................................................................................................................................19112.1.1 Features........................................................................................................................................................19112.2 Memory map and register definition.............................................................................................................................19112.2.1 System Options Register 1 (SIM_SOPT1)..................................................................................................19312.2.2 SOPT1 Configuration Register (SIM_SOPT1CFG)....................................................................................19412.2.3 System Options Register 2 (SIM_SOPT2)..................................................................................................19512.2.4 System Options Register 4 (SIM_SOPT4)..................................................................................................19712.2.5 System Options Register 5 (SIM_SOPT5)..................................................................................................19912.2.6 System Options Register 7 (SIM_SOPT7)..................................................................................................20012.2.7 System Device Identification Register (SIM_SDID)...................................................................................20212.2.8 System Clock Gating Control Register 4 (SIM_SCGC4)............................................................................20412.2.9 System Clock Gating Control Register 5 (SIM_SCGC5)............................................................................20612.2.10 System Clock Gating Control Register 6 (SIM_SCGC6)............................................................................20712.2.11 System Clock Gating Control Register 7 (SIM_SCGC7)............................................................................20912.2.12 System Clock Divider Register 1 (SIM_CLKDIV1)...................................................................................210KL25 Sub-Family Reference Manual, Rev. 3, September 2012Freescale Semiconductor, Inc. 9
