Ethernet ModuleMCF5272 ColdFire ® Integrated Microprocessor User’s Manual, Rev. 311-16 Freescale Semiconductor11.5.6 Transmit Descriptor Active Register (TDAR)The TDAR register, Figure 11-10, is a command register which should be set by the user to indicate thatthe transmit descriptor ring has been updated, that is, transmit buffers have been defined by the driver withthe ready bit set in the buffer descriptor.The X_DES_ACTIVE bit is set whenever the register is written. This is independent of the data actuallywritten by the user. When TDAR is set, the FEC polls the transmit descriptor ring and processes transmitframes (provided ETHER_EN is also set). As soon as the FEC polls a transmit descriptor whose ready bitis not set, it clears the X_DES_ACTIVE bit and stops polling the transmit descriptor ring.The TDAR register is cleared at reset and when ETHER_EN is cleared. Figure 11-10 describes thisregister.Table 11-12 describes the TDAR fields.31 25 24 23 16Field — X_DES_ACTIVE —Reset 0000_0000_0000_0000R/W Read/Write15 0Field —Reset 0000_0000_0000_0000R/W Read/WriteAddr MBAR +0x854Figure 11-10. Transmit Descriptor Active Register (TDAR)Table 11-12. TDAR Field DescriptionsBits Name Description31–25 — Reserved, should be cleared.24 X_DES_ACTIVE Set to one when this register is written, regardless of the value written. Cleared by the FECwhenever no additional ready descriptors remain in the transmit ring.23–0 — Reserved, should be cleared.
