MCF5272 ColdFire®Integrated Microprocessor User’s Manual, Rev. 3xlviiiFreescale Semiconductory,xSource and destination effective addresses, respectivelyAssembly language program labelList of registers for MOVEM instruction (example: D3–D0)Shift operation: shift left (<<), shift right (>>)Operand data size: byte (B), word (W), longword (L)bcBoth instruction and data cachesdcData cacheicInstruction cache# Identifies the 4-bit vector number for trap instructions<>identifies an indirect data address referencing memoryidentifies an absolute address referencing memorydnSignal displacement value,nbits wide (example: d16 is a 16-bit displacement)SFScale factor (x1, x2, x4 for indexed addressing mode, <<1n>> for MAC operations)Operations+Arithmetic addition or postincrement indicator–Arithmetic subtraction or predecrement indicatorxArithmetic multiplication/Arithmetic division~Invert; operand is logically complemented&Logical AND|Logical OR^Logical exclusive OR<<Shift left (example: D0 << 3 is shift D0 left 3 bits)>>Shift right (example: D0 >> 3 is shift D0 right 3 bits)→Source operand is moved to destination operand←→Two operands are exchangedsign-extendedAll bits of the upper portion are made equal to the high-order bit of the lower portionIf then else Test the condition. If true, the operations after ‘then’ are performed. If the condition is false and the optional‘else’ clause is present, the operations after ‘else’ are performed. If the condition is false and else isomitted, the instruction performs no operation. Refer to the Bcc instruction description as an example.Table ii. Notational Conventions (continued)InstructionOperand Syntax
