Timer ModuleMCF5272 ColdFire ® Integrated Microprocessor User’s Manual, Rev. 315-2 Freescale SemiconductorFigure 15-1. Timer Block DiagramTimers 0 and 1 may output a signal on the timer outputs (TOUT0 or TOUT1) when the reference value isreached, as selected by the output mode bit, TMR[OM]. This signal can be an active-low pulse or a toggleof the current output, under program control.The TCAPs are used to latch counter values when the corresponding input capture edge detector detects adefined transition (of TIN0, TIN1, URT0_RxD, or URT1_RxD). The type of transition triggering thecapture is selected by the capture edge bits, TMR[CE].A capture or reference event sets the TER bit andgenerates a maskable interrupt.Data [16)TimerClockGeneratorDividerTimer Mode Register (TMR0)Prescaler Mode BitsTimer Counter (TCN0)15 0Timer Reference Register (TRR0)15 0Timer Capture Register (TCAP0)15 015 0CaptureDetectionSystem Clock orSystem Clock/16TIN0TOUT0ClockTimer 0Timer 1Interrupt (T1)Interrupt (T0)TOUT1TIN1TimerClockGeneratorDividerTimer Mode Register (TMR 2)Prescaler Mode BitsTimer Counter (TCN2)15 0Timer Reference Register (TRR2)15 0Timer Capture Register (TCAP2)15 015 0CaptureDetectionSystem Clock orSystem Clock/16UART0_RxDClockTimer 2Timer 3Interrupt (T3)Interrupt (T2)UART1_RxDTimer Event Register (TER0)15 0Timer Event Register (TER2)15 0
