UART ModulesMCF5272 ColdFire ® Integrated Microprocessor User’s Manual, Rev. 316-8 Freescale Semiconductor16.3.4 UART Clock-Select Registers (UCSRn)The UART clock-select registers (UCSRn) select an external clock on the URT_CLK input (divided by 1or 16) or a prescaled CLKIN as the clocking source for the transmitter and receiver. See Section 16.5.1,“Transmitter/Receiver Clock Source.” The transmitter and receiver can use different clock sources. To useCLKIN for both, set UCSRn to 0xDD.Table 16-5 describes UCSRn fields.1 FFULL FIFO full. This bit is equivalent to URF[FULL].0 The FIFO is not full but may hold unread characters.1 A character was received and the receiver FIFO is now full. Any characters received when the FIFO is fullare lost.0 RxRDY Receiver ready0 The CPU has read the receiver buffer and no characters remain in the FIFO after this read.1 One or more characters were received and are waiting in the receiver buffer FIFO.7 4 3 0Field RCS TCSReset 0000_0000R/W Write onlyAddress MBAR + 0x104 (UCSR0), 0x144 (UCSR1)Figure 16-5. UART Clock-Select Registers (UCSRn)Table 16-5. UCSRn Field DescriptionsBits Name Description7–4 RCS Receiver clock select. Selects the clock source for the receiver channel.1101 Prescaled CLKIN1110 URT_CLK divided by 161111 URT_CLK3–0 TCS Transmitter clock select. Selects the clock source for the transmitter channel.1101 Prescaled CLKIN1110 URT_CLK divided by 161111 URT_CLKTable 16-4. USRn Field Descriptions (continued)Bits Name Description
