UART ModulesMCF5272 ColdFire ® Integrated Microprocessor User’s Manual, Rev. 3Freescale Semiconductor 16-3Table 16-1. UART Module Programming ModelMBAR Offset[31:24] [23:16] [15:8] [7:0]UART0 UART10x100 0x140 UART moderegisters 1—(UMR1n) [p.16-4], (UMR2n) [p. 16-6]—0x104 0x144 (Read) UART statusregisters—(USRn) [p. 16-7]—(Write) UART clock-selectregister 1 —(UCSRn) [p. 16-8]—0x108 0x148 (Read) Do not access.2 —(Write) UART commandregisters—(UCRn) [p. 16-9]—0x10C 0x14C (UART/Read) UART receiverbuffers—(URBn) [p. 16-10]—(UART/Write) UARTtransmitter buffers—(UTBn)[p. 16-11]—0x110 0x150 (Read) UART input portchange registers—(UIPCRn)[p. 16-11]—(Write) UART auxiliary controlregisters 1—(UACRn) [p.16-12]—0x114 0x154 (Read) UART interrupt statusregisters—(UISRn) [p. 16-12]—(Write) UART interrupt maskregisters—(UIMRn) [p. 16-12]—0x118 0x158 (Read) Do not access.2 —UART divider upperregisters—(UDUn) [p. 16-14]—0x11C 0x15C (Read) Do not access.2 —UART divider lowerregisters—(UDLn) [p. 16-14]—0x120 0x160 (Read) UART autobaudregister MSB—(UABUn) [p.16-17]—(Write) Do not access.2 —0x124 0x164 (Read) UART autobaudregister LSB—(UABLn) [p.16-17]—(Write) Do not access2 —0x128 0x168 UART Transmitter FIFOregisters—(UTFn) [p. 16-4]—
